This repository contains source code for past labs and projects involving FPGA and Verilog based designs

Practices related to the fundamental level of the programming language Verilog.

simple verilog digital circuits sampels (halfAdder, fullAdder, ALSU , ...)

32-bit ALU design for MIPS.

A repository for some modules I made while learning Verilog

mirror of https://git.elphel.com/Elphel/x359

VHDL(Verilog Hardware Description Language) is a programming language using which one can simulate hardware circuits

An 8-bit calculator that can multiply, add and subtract. Created and simulated in Quartus Prime and physically implemented in DEC-SOC1 FPGA.

This repository is for Computer Organization course. The work in this repository aims to show skills in scripting circuits using Verilog and programming FPGA board.

"Verilog_HDL" repository contains hardware description language (HDL) code written in Verilog for various digital logic and electronic designs."

This repository focuses on designing and simulating logical circuits using Verilog HDL (Hardware Description Language) with the Icarus Verilog simulator.

Gate-level implementation of a 2-to-1 multiplexer using Verilog, complete with a testbench, truth table validation, and waveform analysis for beginners in digital logic design.

"Repository containing a collection of Verilog code modules and test bench for digital design projects. "

My Solutions to Digital-System-Design Practical Assignments

A collection of Verilog modules and testbenches developed for digital system design exercises, including registers, counters, state machines, and multiplexers