📚 📖 📚CSE GATE Resources for GATE and CSE Aspirants 😎 😁 . Show your ❤️ by ⭐️⭐️
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Updated
Feb 12, 2024
📚 📖 📚CSE GATE Resources for GATE and CSE Aspirants 😎 😁 . Show your ❤️ by ⭐️⭐️
Teaching Materials for Dr. Waleed A. Yousef
IIC-OSIC-TOOLS is an all-in-one Docker image for SKY130/GF180/IHP130-based analog and digital chip design. AMD64 and ARM64 are natively supported.
This repository hosts the code for an FPGA based accelerator for convolutional neural networks
A minimal-area RISC-V core with a scalable data path to 1, 2, 4, or 8 bits and manifold variants.
Python script for generating lookup tables for the gm/ID design methodology and much more ...
Introduction to FPGA emulation and digital design. This capstone project was part of the 2021 University of San Diego Shiley-Marcos School of Engineering & Computing Showcase.
AdobeAllInOne is a comprehensive suite of creative software tools developed by Adobe. It includes a range of applications for design, photography, video editing, and more, making it the ultimate solution for all your creative needs.
An open source, parameterized SystemVerilog digital hardware IP library
VHDL code examples for a digital design course
A VHDL-based VGA driver to implement a square 41x41 screensaver that cycles through 256 different colors.
A repository containing the source codes for the Digital Design and Computer Organization Laboratory course (UE18CS2) at PES University.
A VHDL-based VGA driver to display 256 different colors on a monitor.
The project uses a Xilinx Artix-7 FPGA on a Digilent Basys 3 board to design a clock whose seconds, minutes, & hours are displayed on a Quad 7-segment display & can also be displayed on a vga display. Picoblaze processor is used to control the Analog & Digital displays of the clock.
Distributed arithmetic (DA) is another way of implementing a dot product where one of the arrays has constant elements. The DA can be effectively used to implement FIR, IIR and FFT type.The DA logic replaces the MAC operation of convolution summation o into a bit-serial look-up table read and addition operation .
Comprehensive verification suite for the AHB2APB Bridge design, featuring SystemVerilog and UVM-based methodologies. 🌉🚀
An introduction to integrated circuit design with Verilog and the Papilio Pro development board.
32 bit pipelined binary floating point adder using IEEE-754 Single Precision Format in Verilog
A collection of my cources, lectures, articles and presentations
SystemVerilog examples for a digital design course
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