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Benchmarks 2024 11 26 TVM GCC Os spike_rv32_min

GitHub Action edited this page Nov 26, 2024 · 1 revision

Setup

Simulator

  • Spike (riscv-isa-sim ) (ISS, CPI=1)
    • Spike : eb0a3e2b0a7c57522928be39de95cd9f8c6dc636
    • Spike PK : fix-gcc14-rvv

Toolchains

Models

Frameworks

  • MLonMCU : develop

  • TVM : Nightly Pre-Build

Miscellaneous

  • Used -Os flag for compilation.
  • Benchmarks generated using MLonMCU deployment tool with minimal efforts.
  • Memory metrics are reported in Bytes

Results (Framework: tvm, Backend: tvmaot, Toolchain: gcc, Flags: -Os, Target: spike_rv32_min )

Audio Wake Words (aww)

Cycles (Speedup) Total ROM (rel.) Total RAM (rel.) VLEN Layout Kernels Mode Arch Unroll Auto-Vectorization
31342199.0
( 0.6x )
144984
( 1.223 )
59524
( 3.098 )
0 NCHW TVM Fallback RV32IM 0 -
29616448.0
( 0.6x )
137544
( 1.16 )
59524
( 3.098 )
0 NHWC TVM Fallback RV32IM 0 -
32045897.0
( 0.5x )
144948
( 1.222 )
59524
( 3.098 )
128 NCHW TVM Fallback RV32IM_ZVE64X 0 Loop+SLP
-
( ?x )
144804
( 1.221 )
59524
( 3.098 )
256 NCHW TVM Fallback RV32IM_ZVE64X 0 Loop+SLP
-
( ?x )
144728
( 1.22 )
59524
( 3.098 )
512 NCHW TVM Fallback RV32IM_ZVE64X 0 Loop+SLP
-
( ?x )
144368
( 1.217 )
59524
( 3.098 )
1024 NCHW TVM Fallback RV32IM_ZVE64X 0 Loop+SLP
-
( ?x )
144536
( 1.219 )
59524
( 3.098 )
2048 NCHW TVM Fallback RV32IM_ZVE64X 0 Loop+SLP
-
( ?x )
144536
( 1.219 )
59524
( 3.098 )
4096 NCHW TVM Fallback RV32IM_ZVE64X 0 Loop+SLP
29615599.0
( 0.6x )
138024
( 1.164 )
59524
( 3.098 )
128 NHWC TVM Fallback RV32IM_ZVE64X 0 Loop+SLP
29615599.0
( 0.6x )
138024
( 1.164 )
59524
( 3.098 )
256 NHWC TVM Fallback RV32IM_ZVE64X 0 Loop+SLP
29615599.0
( 0.6x )
138024
( 1.164 )
59524
( 3.098 )
512 NHWC TVM Fallback RV32IM_ZVE64X 0 Loop+SLP
29615599.0
( 0.6x )
138024
( 1.164 )
59524
( 3.098 )
1024 NHWC TVM Fallback RV32IM_ZVE64X 0 Loop+SLP
29615599.0
( 0.6x )
138024
( 1.164 )
59524
( 3.098 )
2048 NHWC TVM Fallback RV32IM_ZVE64X 0 Loop+SLP
29615599.0
( 0.6x )
138024
( 1.164 )
59524
( 3.098 )
4096 NHWC TVM Fallback RV32IM_ZVE64X 0 Loop+SLP
17268071.0
( Base )
118596
( Base )
19212
( Base )
0 NHWC muRISCV-NN Scalar RV32IM 0 -
17213817.0
( 1.0x )
118276
( 0.997 )
23676
( 1.232 )
0 NHWC muRISCV-NN Vector (Portable) RV32IM 0 -
17265521.0
( 1.0x )
119008
( 1.003 )
19212
( 1.0 )
128 NHWC muRISCV-NN Scalar RV32IM_ZVE64X 0 Loop+SLP
17265475.0
( 1.0x )
118976
( 1.003 )
19212
( 1.0 )
256 NHWC muRISCV-NN Scalar RV32IM_ZVE64X 0 Loop+SLP
-
( ?x )
118976
( 1.003 )
19212
( 1.0 )
512 NHWC muRISCV-NN Scalar RV32IM_ZVE64X 0 Loop+SLP
-
( ?x )
118976
( 1.003 )
19212
( 1.0 )
1024 NHWC muRISCV-NN Scalar RV32IM_ZVE64X 0 Loop+SLP
-
( ?x )
118976
( 1.003 )
19212
( 1.0 )
2048 NHWC muRISCV-NN Scalar RV32IM_ZVE64X 0 Loop+SLP
-
( ?x )
118976
( 1.003 )
19212
( 1.0 )
4096 NHWC muRISCV-NN Scalar RV32IM_ZVE64X 0 Loop+SLP
-
( ?x )
122516
( 1.033 )
23676
( 1.232 )
128 NHWC muRISCV-NN Vector RV32IM_ZVE64X 0 -
-
( ?x )
122516
( 1.033 )
23676
( 1.232 )
256 NHWC muRISCV-NN Vector RV32IM_ZVE64X 0 -
-
( ?x )
122516
( 1.033 )
23676
( 1.232 )
512 NHWC muRISCV-NN Vector RV32IM_ZVE64X 0 -
-
( ?x )
122516
( 1.033 )
23676
( 1.232 )
1024 NHWC muRISCV-NN Vector RV32IM_ZVE64X 0 -
-
( ?x )
122516
( 1.033 )
23676
( 1.232 )
2048 NHWC muRISCV-NN Vector RV32IM_ZVE64X 0 -
-
( ?x )
122516
( 1.033 )
23676
( 1.232 )
4096 NHWC muRISCV-NN Vector RV32IM_ZVE64X 0 -
17211767.0
( 1.0x )
118692
( 1.001 )
23676
( 1.232 )
128 NHWC muRISCV-NN Vector (Portable) RV32IM_ZVE64X 0 Loop+SLP
17211721.0
( 1.0x )
118660
( 1.001 )
23676
( 1.232 )
256 NHWC muRISCV-NN Vector (Portable) RV32IM_ZVE64X 0 Loop+SLP
-
( ?x )
118660
( 1.001 )
23676
( 1.232 )
512 NHWC muRISCV-NN Vector (Portable) RV32IM_ZVE64X 0 Loop+SLP
-
( ?x )
118660
( 1.001 )
23676
( 1.232 )
1024 NHWC muRISCV-NN Vector (Portable) RV32IM_ZVE64X 0 Loop+SLP
-
( ?x )
118660
( 1.001 )
23676
( 1.232 )
2048 NHWC muRISCV-NN Vector (Portable) RV32IM_ZVE64X 0 Loop+SLP
-
( ?x )
118660
( 1.001 )
23676
( 1.232 )
4096 NHWC muRISCV-NN Vector (Portable) RV32IM_ZVE64X 0 Loop+SLP

Image Classification (resnet)

Cycles (Speedup) Total ROM (rel.) Total RAM (rel.) VLEN Layout Kernels Mode Arch Unroll Auto-Vectorization
133371744.0
( 0.6x )
255068
( 1.526 )
108436
( 1.953 )
0 NCHW TVM Fallback RV32IM 0 -
115694423.0
( 0.7x )
243460
( 1.457 )
108436
( 1.953 )
0 NHWC TVM Fallback RV32IM 0 -
127515979.0
( 0.6x )
254216
( 1.521 )
108436
( 1.953 )
128 NCHW TVM Fallback RV32IM_ZVE64X 0 Loop+SLP
131200332.0
( 0.6x )
253936
( 1.519 )
108436
( 1.953 )
256 NCHW TVM Fallback RV32IM_ZVE64X 0 Loop+SLP
133096639.0
( 0.6x )
253900
( 1.519 )
108436
( 1.953 )
512 NCHW TVM Fallback RV32IM_ZVE64X 0 Loop+SLP
133139033.0
( 0.6x )
254084
( 1.52 )
108436
( 1.953 )
1024 NCHW TVM Fallback RV32IM_ZVE64X 0 Loop+SLP
133354686.0
( 0.6x )
254052
( 1.52 )
108436
( 1.953 )
2048 NCHW TVM Fallback RV32IM_ZVE64X 0 Loop+SLP
133354686.0
( 0.6x )
254052
( 1.52 )
108436
( 1.953 )
4096 NCHW TVM Fallback RV32IM_ZVE64X 0 Loop+SLP
115689040.0
( 0.7x )
243924
( 1.459 )
108436
( 1.953 )
128 NHWC TVM Fallback RV32IM_ZVE64X 0 Loop+SLP
115689040.0
( 0.7x )
243924
( 1.459 )
108436
( 1.953 )
256 NHWC TVM Fallback RV32IM_ZVE64X 0 Loop+SLP
115689040.0
( 0.7x )
243924
( 1.459 )
108436
( 1.953 )
512 NHWC TVM Fallback RV32IM_ZVE64X 0 Loop+SLP
115689040.0
( 0.7x )
243924
( 1.459 )
108436
( 1.953 )
1024 NHWC TVM Fallback RV32IM_ZVE64X 0 Loop+SLP
115689040.0
( 0.7x )
243924
( 1.459 )
108436
( 1.953 )
2048 NHWC TVM Fallback RV32IM_ZVE64X 0 Loop+SLP
115689040.0
( 0.7x )
243924
( 1.459 )
108436
( 1.953 )
4096 NHWC TVM Fallback RV32IM_ZVE64X 0 Loop+SLP
79947127.0
( Base )
167132
( Base )
55516
( Base )
0 NHWC muRISCV-NN Scalar RV32IM 0 -
79039942.0
( 1.0x )
166700
( 0.997 )
55516
( 1.0 )
0 NHWC muRISCV-NN Vector (Portable) RV32IM 0 -
79737926.0
( 1.0x )
167340
( 1.001 )
55516
( 1.0 )
128 NHWC muRISCV-NN Scalar RV32IM_ZVE64X 0 Loop+SLP
79945058.0
( 1.0x )
167240
( 1.001 )
55516
( 1.0 )
256 NHWC muRISCV-NN Scalar RV32IM_ZVE64X 0 Loop+SLP
-
( ?x )
167240
( 1.001 )
55516
( 1.0 )
512 NHWC muRISCV-NN Scalar RV32IM_ZVE64X 0 Loop+SLP
-
( ?x )
167240
( 1.001 )
55516
( 1.0 )
1024 NHWC muRISCV-NN Scalar RV32IM_ZVE64X 0 Loop+SLP
-
( ?x )
167240
( 1.001 )
55516
( 1.0 )
2048 NHWC muRISCV-NN Scalar RV32IM_ZVE64X 0 Loop+SLP
-
( ?x )
167240
( 1.001 )
55516
( 1.0 )
4096 NHWC muRISCV-NN Scalar RV32IM_ZVE64X 0 Loop+SLP
28324967.0
( 2.8x )
171280
( 1.025 )
55516
( 1.0 )
128 NHWC muRISCV-NN Vector RV32IM_ZVE64X 0 -
17525265.0
( 4.6x )
171280
( 1.025 )
55516
( 1.0 )
256 NHWC muRISCV-NN Vector RV32IM_ZVE64X 0 -
12615931.0
( 6.3x )
171280
( 1.025 )
55516
( 1.0 )
512 NHWC muRISCV-NN Vector RV32IM_ZVE64X 0 -
-
( ?x )
171280
( 1.025 )
55516
( 1.0 )
1024 NHWC muRISCV-NN Vector RV32IM_ZVE64X 0 -
-
( ?x )
171280
( 1.025 )
55516
( 1.0 )
2048 NHWC muRISCV-NN Vector RV32IM_ZVE64X 0 -
-
( ?x )
171280
( 1.025 )
55516
( 1.0 )
4096 NHWC muRISCV-NN Vector RV32IM_ZVE64X 0 -
78905002.0
( 1.0x )
166912
( 0.999 )
55516
( 1.0 )
128 NHWC muRISCV-NN Vector (Portable) RV32IM_ZVE64X 0 Loop+SLP
78958350.0
( 1.0x )
166812
( 0.998 )
55516
( 1.0 )
256 NHWC muRISCV-NN Vector (Portable) RV32IM_ZVE64X 0 Loop+SLP
-
( ?x )
166812
( 0.998 )
55516
( 1.0 )
512 NHWC muRISCV-NN Vector (Portable) RV32IM_ZVE64X 0 Loop+SLP
-
( ?x )
166812
( 0.998 )
55516
( 1.0 )
1024 NHWC muRISCV-NN Vector (Portable) RV32IM_ZVE64X 0 Loop+SLP
-
( ?x )
166812
( 0.998 )
55516
( 1.0 )
2048 NHWC muRISCV-NN Vector (Portable) RV32IM_ZVE64X 0 Loop+SLP
-
( ?x )
166812
( 0.998 )
55516
( 1.0 )
4096 NHWC muRISCV-NN Vector (Portable) RV32IM_ZVE64X 0 Loop+SLP

Anomaly Detection (toycar)

Cycles (Speedup) Total ROM (rel.) Total RAM (rel.) VLEN Layout Kernels Mode Arch Unroll Auto-Vectorization
3131214.0
( 0.6x )
609404
( 1.768 )
5548
( 1.168 )
0 NCHW TVM Fallback RV32IM 0 -
3131214.0
( 0.6x )
609404
( 1.768 )
5548
( 1.168 )
0 NHWC TVM Fallback RV32IM 0 -
3131345.0
( 0.6x )
609916
( 1.769 )
5548
( 1.168 )
128 NCHW TVM Fallback RV32IM_ZVE64X 0 Loop+SLP
3131345.0
( 0.6x )
609916
( 1.769 )
5548
( 1.168 )
256 NCHW TVM Fallback RV32IM_ZVE64X 0 Loop+SLP
3131345.0
( 0.6x )
609916
( 1.769 )
5548
( 1.168 )
512 NCHW TVM Fallback RV32IM_ZVE64X 0 Loop+SLP
3131345.0
( 0.6x )
609916
( 1.769 )
5548
( 1.168 )
1024 NCHW TVM Fallback RV32IM_ZVE64X 0 Loop+SLP
3131345.0
( 0.6x )
609916
( 1.769 )
5548
( 1.168 )
2048 NCHW TVM Fallback RV32IM_ZVE64X 0 Loop+SLP
3131345.0
( 0.6x )
609916
( 1.769 )
5548
( 1.168 )
4096 NCHW TVM Fallback RV32IM_ZVE64X 0 Loop+SLP
3131345.0
( 0.6x )
609916
( 1.769 )
5548
( 1.168 )
128 NHWC TVM Fallback RV32IM_ZVE64X 0 Loop+SLP
3131345.0
( 0.6x )
609916
( 1.769 )
5548
( 1.168 )
256 NHWC TVM Fallback RV32IM_ZVE64X 0 Loop+SLP
3131345.0
( 0.6x )
609916
( 1.769 )
5548
( 1.168 )
512 NHWC TVM Fallback RV32IM_ZVE64X 0 Loop+SLP
3131345.0
( 0.6x )
609916
( 1.769 )
5548
( 1.168 )
1024 NHWC TVM Fallback RV32IM_ZVE64X 0 Loop+SLP
3131345.0
( 0.6x )
609916
( 1.769 )
5548
( 1.168 )
2048 NHWC TVM Fallback RV32IM_ZVE64X 0 Loop+SLP
3131345.0
( 0.6x )
609916
( 1.769 )
5548
( 1.168 )
4096 NHWC TVM Fallback RV32IM_ZVE64X 0 Loop+SLP
1881746.0
( Base )
344776
( Base )
4748
( Base )
0 NHWC muRISCV-NN Scalar RV32IM 0 -
1881744.0
( 1.0x )
344768
( 1.0 )
4748
( 1.0 )
0 NHWC muRISCV-NN Vector (Portable) RV32IM 0 -
1879894.0
( 1.0x )
344864
( 1.0 )
4748
( 1.0 )
128 NHWC muRISCV-NN Scalar RV32IM_ZVE64X 0 Loop+SLP
1879894.0
( 1.0x )
344864
( 1.0 )
4748
( 1.0 )
256 NHWC muRISCV-NN Scalar RV32IM_ZVE64X 0 Loop+SLP
-
( ?x )
344864
( 1.0 )
4748
( 1.0 )
512 NHWC muRISCV-NN Scalar RV32IM_ZVE64X 0 Loop+SLP
-
( ?x )
344864
( 1.0 )
4748
( 1.0 )
1024 NHWC muRISCV-NN Scalar RV32IM_ZVE64X 0 Loop+SLP
-
( ?x )
344864
( 1.0 )
4748
( 1.0 )
2048 NHWC muRISCV-NN Scalar RV32IM_ZVE64X 0 Loop+SLP
-
( ?x )
344856
( 1.0 )
4748
( 1.0 )
4096 NHWC muRISCV-NN Scalar RV32IM_ZVE64X 0 Loop+SLP
905048.0
( 2.1x )
346960
( 1.006 )
4748
( 1.0 )
128 NHWC muRISCV-NN Vector RV32IM_ZVE64X 0 -
664246.0
( 2.8x )
346952
( 1.006 )
4748
( 1.0 )
256 NHWC muRISCV-NN Vector RV32IM_ZVE64X 0 -
-
( ?x )
346960
( 1.006 )
4748
( 1.0 )
512 NHWC muRISCV-NN Vector RV32IM_ZVE64X 0 -
-
( ?x )
346960
( 1.006 )
4748
( 1.0 )
1024 NHWC muRISCV-NN Vector RV32IM_ZVE64X 0 -
-
( ?x )
346960
( 1.006 )
4748
( 1.0 )
2048 NHWC muRISCV-NN Vector RV32IM_ZVE64X 0 -
-
( ?x )
346960
( 1.006 )
4748
( 1.0 )
4096 NHWC muRISCV-NN Vector RV32IM_ZVE64X 0 -
1879894.0
( 1.0x )
344864
( 1.0 )
4748
( 1.0 )
128 NHWC muRISCV-NN Vector (Portable) RV32IM_ZVE64X 0 Loop+SLP
1879894.0
( 1.0x )
344864
( 1.0 )
4748
( 1.0 )
256 NHWC muRISCV-NN Vector (Portable) RV32IM_ZVE64X 0 Loop+SLP
-
( ?x )
344864
( 1.0 )
4748
( 1.0 )
512 NHWC muRISCV-NN Vector (Portable) RV32IM_ZVE64X 0 Loop+SLP
-
( ?x )
344856
( 1.0 )
4748
( 1.0 )
1024 NHWC muRISCV-NN Vector (Portable) RV32IM_ZVE64X 0 Loop+SLP
-
( ?x )
344864
( 1.0 )
4748
( 1.0 )
2048 NHWC muRISCV-NN Vector (Portable) RV32IM_ZVE64X 0 Loop+SLP
-
( ?x )
344864
( 1.0 )
4748
( 1.0 )
4096 NHWC muRISCV-NN Vector (Portable) RV32IM_ZVE64X 0 Loop+SLP

Visual Wake Words (vww)

Cycles (Speedup) Total ROM (rel.) Total RAM (rel.) VLEN Layout Kernels Mode Arch Unroll Auto-Vectorization
90768700.0
( 0.6x )
586232
( 1.655 )
181032
( 2.114 )
0 NCHW TVM Fallback RV32IM 0 -
86009457.0
( 0.6x )
560028
( 1.581 )
181032
( 2.114 )
0 NHWC TVM Fallback RV32IM 0 -
92956261.0
( 0.6x )
584416
( 1.65 )
181032
( 2.114 )
128 NCHW TVM Fallback RV32IM_ZVE64X 0 Loop+SLP
92441733.0
( 0.6x )
582984
( 1.646 )
181032
( 2.114 )
256 NCHW TVM Fallback RV32IM_ZVE64X 0 Loop+SLP
-
( ?x )
582952
( 1.646 )
181032
( 2.114 )
512 NCHW TVM Fallback RV32IM_ZVE64X 0 Loop+SLP
-
( ?x )
582952
( 1.646 )
181032
( 2.114 )
1024 NCHW TVM Fallback RV32IM_ZVE64X 0 Loop+SLP
-
( ?x )
583252
( 1.647 )
181032
( 2.114 )
2048 NCHW TVM Fallback RV32IM_ZVE64X 0 Loop+SLP
-
( ?x )
583252
( 1.647 )
181032
( 2.114 )
4096 NCHW TVM Fallback RV32IM_ZVE64X 0 Loop+SLP
85987518.0
( 0.6x )
560428
( 1.582 )
181032
( 2.114 )
128 NHWC TVM Fallback RV32IM_ZVE64X 0 Loop+SLP
85987518.0
( 0.6x )
560428
( 1.582 )
181032
( 2.114 )
256 NHWC TVM Fallback RV32IM_ZVE64X 0 Loop+SLP
85987518.0
( 0.6x )
560428
( 1.582 )
181032
( 2.114 )
512 NHWC TVM Fallback RV32IM_ZVE64X 0 Loop+SLP
85987518.0
( 0.6x )
560428
( 1.582 )
181032
( 2.114 )
1024 NHWC TVM Fallback RV32IM_ZVE64X 0 Loop+SLP
85987518.0
( 0.6x )
560428
( 1.582 )
181032
( 2.114 )
2048 NHWC TVM Fallback RV32IM_ZVE64X 0 Loop+SLP
85987518.0
( 0.6x )
560428
( 1.582 )
181032
( 2.114 )
4096 NHWC TVM Fallback RV32IM_ZVE64X 0 Loop+SLP
51933657.0
( Base )
354196
( Base )
85648
( Base )
0 NHWC muRISCV-NN Scalar RV32IM 0 -
52901714.0
( 1.0x )
354344
( 1.0 )
85648
( 1.0 )
0 NHWC muRISCV-NN Vector (Portable) RV32IM 0 -
51924258.0
( 1.0x )
353972
( 0.999 )
85648
( 1.0 )
128 NHWC muRISCV-NN Scalar RV32IM_ZVE64X 0 Loop+SLP
51918968.0
( 1.0x )
353604
( 0.998 )
85648
( 1.0 )
256 NHWC muRISCV-NN Scalar RV32IM_ZVE64X 0 Loop+SLP
-
( ?x )
353604
( 0.998 )
85648
( 1.0 )
512 NHWC muRISCV-NN Scalar RV32IM_ZVE64X 0 Loop+SLP
-
( ?x )
353604
( 0.998 )
85648
( 1.0 )
1024 NHWC muRISCV-NN Scalar RV32IM_ZVE64X 0 Loop+SLP
-
( ?x )
353604
( 0.998 )
85648
( 1.0 )
2048 NHWC muRISCV-NN Scalar RV32IM_ZVE64X 0 Loop+SLP
-
( ?x )
353604
( 0.998 )
85648
( 1.0 )
4096 NHWC muRISCV-NN Scalar RV32IM_ZVE64X 0 Loop+SLP
-
( ?x )
357580
( 1.01 )
85648
( 1.0 )
128 NHWC muRISCV-NN Vector RV32IM_ZVE64X 0 -
-
( ?x )
357580
( 1.01 )
85648
( 1.0 )
256 NHWC muRISCV-NN Vector RV32IM_ZVE64X 0 -
-
( ?x )
357580
( 1.01 )
85648
( 1.0 )
512 NHWC muRISCV-NN Vector RV32IM_ZVE64X 0 -
-
( ?x )
357580
( 1.01 )
85648
( 1.0 )
1024 NHWC muRISCV-NN Vector RV32IM_ZVE64X 0 -
-
( ?x )
357580
( 1.01 )
85648
( 1.0 )
2048 NHWC muRISCV-NN Vector RV32IM_ZVE64X 0 -
-
( ?x )
357580
( 1.01 )
85648
( 1.0 )
4096 NHWC muRISCV-NN Vector RV32IM_ZVE64X 0 -
52712253.0
( 1.0x )
354072
( 1.0 )
85648
( 1.0 )
128 NHWC muRISCV-NN Vector (Portable) RV32IM_ZVE64X 0 Loop+SLP
52706963.0
( 1.0x )
353688
( 0.999 )
85648
( 1.0 )
256 NHWC muRISCV-NN Vector (Portable) RV32IM_ZVE64X 0 Loop+SLP
-
( ?x )
353688
( 0.999 )
85648
( 1.0 )
512 NHWC muRISCV-NN Vector (Portable) RV32IM_ZVE64X 0 Loop+SLP
-
( ?x )
353688
( 0.999 )
85648
( 1.0 )
1024 NHWC muRISCV-NN Vector (Portable) RV32IM_ZVE64X 0 Loop+SLP
-
( ?x )
353688
( 0.999 )
85648
( 1.0 )
2048 NHWC muRISCV-NN Vector (Portable) RV32IM_ZVE64X 0 Loop+SLP
-
( ?x )
353688
( 0.999 )
85648
( 1.0 )
4096 NHWC muRISCV-NN Vector (Portable) RV32IM_ZVE64X 0 Loop+SLP

Original data

Click here to download the raw files for this benchmark.

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