Benchmarks 2024 11 18 TVM GCC Os spike_rv64

Setup

Simulator

Spike (riscv-isa-sim ) (ISS, CPI=1)
- Spike : 0bc176b3fca43560b9e8586cdbc41cfde073e17a
- Spike PK : 7e9b671c0415dfd7b562ac934feb9380075d4aa2

Toolchains

RISC-V GCC:
- Scalar: riscv32-unknown-elf-gcc (gc891d8dc23e) 13.2.0
- Vector: riscv32-unknown-elf-gcc (gc891d8dc23e) 13.2.0
- Packed: Self compiled using patches found in https://github.com/riscv-collab/riscv-gcc/pull/258 and https://github.com/riscvarchive/riscv-binutils-gdb/pull/257

Models

MLPerfTiny Benchmark
TODO: others!

Frameworks

MLonMCU : develop
TVM : Nightly Pre-Build

Miscellaneous

Used -Os flag for compilation.
Benchmarks generated using MLonMCU deployment tool with minimal efforts.
Memory metrics are reported in Bytes

Results (Framework: tvm, Backend: tvmaot, Toolchain: gcc, Flags: -Os, Target: spike_rv64 )

Audio Wake Words (`aww`)

Cycles (Speedup)	Total ROM (rel.)	Total RAM (rel.)	VLEN	Layout	Kernels	Mode	Arch	Auto-Vectorization
`28220550` ( 0.7x )	`102062` ( 1.27 )	`61320` ( 2.91 )	0	NCHW	TVM	Fallback	RV64GC	-
`31795178` ( 0.6x )	`96008` ( 1.195 )	`61320` ( 2.91 )	0	NHWC	TVM	Fallback	RV64GC	-
`28253904` ( 0.7x )	`102100` ( 1.27 )	`61320` ( 2.91 )	128	NCHW	TVM	Fallback	RV64GCV	Loop+SLP
`28253904` ( 0.7x )	`102100` ( 1.27 )	`61320` ( 2.91 )	256	NCHW	TVM	Fallback	RV64GCV	Loop+SLP
`28253904` ( 0.7x )	`102100` ( 1.27 )	`61320` ( 2.91 )	512	NCHW	TVM	Fallback	RV64GCV	Loop+SLP
`28253904` ( 0.7x )	`102100` ( 1.27 )	`61320` ( 2.91 )	1024	NCHW	TVM	Fallback	RV64GCV	Loop+SLP
`28253904` ( 0.7x )	`102100` ( 1.27 )	`61320` ( 2.91 )	2048	NCHW	TVM	Fallback	RV64GCV	Loop+SLP
`28253904` ( 0.7x )	`102100` ( 1.27 )	`61320` ( 2.91 )	4096	NCHW	TVM	Fallback	RV64GCV	Loop+SLP
`31795174` ( 0.6x )	`96008` ( 1.195 )	`61320` ( 2.91 )	128	NHWC	TVM	Fallback	RV64GCV	Loop+SLP
`31795174` ( 0.6x )	`96008` ( 1.195 )	`61320` ( 2.91 )	256	NHWC	TVM	Fallback	RV64GCV	Loop+SLP
`31795174` ( 0.6x )	`96008` ( 1.195 )	`61320` ( 2.91 )	512	NHWC	TVM	Fallback	RV64GCV	Loop+SLP
`31795174` ( 0.6x )	`96008` ( 1.195 )	`61320` ( 2.91 )	1024	NHWC	TVM	Fallback	RV64GCV	Loop+SLP
`31795174` ( 0.6x )	`96008` ( 1.195 )	`61320` ( 2.91 )	2048	NHWC	TVM	Fallback	RV64GCV	Loop+SLP
`31795174` ( 0.6x )	`96008` ( 1.195 )	`61320` ( 2.91 )	4096	NHWC	TVM	Fallback	RV64GCV	Loop+SLP
`18616405` ( Base )	`80374` ( Base )	`21072` ( Base )	0	NHWC	muRISCV-NN	Scalar	RV64GC	-
`18616405` ( 1.0x )	`80376` ( 1.0 )	`21072` ( 1.0 )	128	NHWC	muRISCV-NN	Scalar	RV64GCV	Loop+SLP
`18616405` ( 1.0x )	`80376` ( 1.0 )	`21072` ( 1.0 )	256	NHWC	muRISCV-NN	Scalar	RV64GCV	Loop+SLP
`18616405` ( 1.0x )	`80376` ( 1.0 )	`21072` ( 1.0 )	512	NHWC	muRISCV-NN	Scalar	RV64GCV	Loop+SLP
`18616405` ( 1.0x )	`80376` ( 1.0 )	`21072` ( 1.0 )	1024	NHWC	muRISCV-NN	Scalar	RV64GCV	Loop+SLP
`18616405` ( 1.0x )	`80376` ( 1.0 )	`21072` ( 1.0 )	2048	NHWC	muRISCV-NN	Scalar	RV64GCV	Loop+SLP
`18616405` ( 1.0x )	`80376` ( 1.0 )	`21072` ( 1.0 )	4096	NHWC	muRISCV-NN	Scalar	RV64GCV	Loop+SLP
`5960196` ( 3.1x )	`81780` ( 1.017 )	`25536` ( 1.212 )	128	NHWC	muRISCV-NN	Vector	RV64GCV	-
`4812620` ( 3.9x )	`81780` ( 1.017 )	`25536` ( 1.212 )	256	NHWC	muRISCV-NN	Vector	RV64GCV	-
`4243724` ( 4.4x )	`81780` ( 1.017 )	`25536` ( 1.212 )	512	NHWC	muRISCV-NN	Vector	RV64GCV	-
`4201396` ( 4.4x )	`81780` ( 1.017 )	`25536` ( 1.212 )	1024	NHWC	muRISCV-NN	Vector	RV64GCV	-
`4203261` ( 4.4x )	`81780` ( 1.017 )	`25536` ( 1.212 )	2048	NHWC	muRISCV-NN	Vector	RV64GCV	-
`4203261` ( 4.4x )	`81780` ( 1.017 )	`25536` ( 1.212 )	4096	NHWC	muRISCV-NN	Vector	RV64GCV	-

Image Classification (`resnet`)

Cycles (Speedup)	Total ROM (rel.)	Total RAM (rel.)	VLEN	Layout	Kernels	Mode	Arch	Auto-Vectorization
`130956119` ( 0.7x )	`211422` ( 1.642 )	`110232` ( 1.921 )	0	NCHW	TVM	Fallback	RV64GC	-
`129273011` ( 0.7x )	`202038` ( 1.569 )	`110232` ( 1.921 )	0	NHWC	TVM	Fallback	RV64GC	-
`130928720` ( 0.7x )	`211412` ( 1.642 )	`110232` ( 1.921 )	128	NCHW	TVM	Fallback	RV64GCV	Loop+SLP
`130928720` ( 0.7x )	`211414` ( 1.642 )	`110232` ( 1.921 )	256	NCHW	TVM	Fallback	RV64GCV	Loop+SLP
`130928720` ( 0.7x )	`211414` ( 1.642 )	`110232` ( 1.921 )	512	NCHW	TVM	Fallback	RV64GCV	Loop+SLP
`130928720` ( 0.7x )	`211414` ( 1.642 )	`110232` ( 1.921 )	1024	NCHW	TVM	Fallback	RV64GCV	Loop+SLP
`130928720` ( 0.7x )	`211412` ( 1.642 )	`110232` ( 1.921 )	2048	NCHW	TVM	Fallback	RV64GCV	Loop+SLP
`130928720` ( 0.7x )	`211412` ( 1.642 )	`110232` ( 1.921 )	4096	NCHW	TVM	Fallback	RV64GCV	Loop+SLP
`129273005` ( 0.7x )	`202040` ( 1.569 )	`110232` ( 1.921 )	128	NHWC	TVM	Fallback	RV64GCV	Loop+SLP
`129273005` ( 0.7x )	`202038` ( 1.569 )	`110232` ( 1.921 )	256	NHWC	TVM	Fallback	RV64GCV	Loop+SLP
`129273005` ( 0.7x )	`202036` ( 1.569 )	`110232` ( 1.921 )	512	NHWC	TVM	Fallback	RV64GCV	Loop+SLP
`129273005` ( 0.7x )	`202038` ( 1.569 )	`110232` ( 1.921 )	1024	NHWC	TVM	Fallback	RV64GCV	Loop+SLP
`129273005` ( 0.7x )	`202038` ( 1.569 )	`110232` ( 1.921 )	2048	NHWC	TVM	Fallback	RV64GCV	Loop+SLP
`129273005` ( 0.7x )	`202038` ( 1.569 )	`110232` ( 1.921 )	4096	NHWC	TVM	Fallback	RV64GCV	Loop+SLP
`88726729` ( Base )	`128788` ( Base )	`57376` ( Base )	0	NHWC	muRISCV-NN	Scalar	RV64GC	-
`88726729` ( 1.0x )	`128788` ( 1.0 )	`57376` ( 1.0 )	128	NHWC	muRISCV-NN	Scalar	RV64GCV	Loop+SLP
`88726729` ( 1.0x )	`128788` ( 1.0 )	`57376` ( 1.0 )	256	NHWC	muRISCV-NN	Scalar	RV64GCV	Loop+SLP
`88726729` ( 1.0x )	`128788` ( 1.0 )	`57376` ( 1.0 )	512	NHWC	muRISCV-NN	Scalar	RV64GCV	Loop+SLP
`88726729` ( 1.0x )	`128788` ( 1.0 )	`57376` ( 1.0 )	1024	NHWC	muRISCV-NN	Scalar	RV64GCV	Loop+SLP
`88726729` ( 1.0x )	`128788` ( 1.0 )	`57376` ( 1.0 )	2048	NHWC	muRISCV-NN	Scalar	RV64GCV	Loop+SLP
`88726729` ( 1.0x )	`128788` ( 1.0 )	`57376` ( 1.0 )	4096	NHWC	muRISCV-NN	Scalar	RV64GCV	Loop+SLP
`15643673` ( 5.7x )	`130692` ( 1.015 )	`57376` ( 1.0 )	128	NHWC	muRISCV-NN	Vector	RV64GCV	-
`9962489` ( 8.9x )	`130692` ( 1.015 )	`57376` ( 1.0 )	256	NHWC	muRISCV-NN	Vector	RV64GCV	-
`7371753` ( 12.0x )	`130692` ( 1.015 )	`57376` ( 1.0 )	512	NHWC	muRISCV-NN	Vector	RV64GCV	-
`6107689` ( 14.5x )	`130692` ( 1.015 )	`57376` ( 1.0 )	1024	NHWC	muRISCV-NN	Vector	RV64GCV	-
`5165202` ( 17.2x )	`130692` ( 1.015 )	`57376` ( 1.0 )	2048	NHWC	muRISCV-NN	Vector	RV64GCV	-
`4913515` ( 18.1x )	`130692` ( 1.015 )	`57376` ( 1.0 )	4096	NHWC	muRISCV-NN	Vector	RV64GCV	-

Anomaly Detection (`toycar`)

Cycles (Speedup)	Total ROM (rel.)	Total RAM (rel.)	VLEN	Layout	Kernels	Mode	Arch	Auto-Vectorization
`3127410` ( 0.6x )	`574402` ( 1.858 )	`7408` ( 1.121 )	0	NCHW	TVM	Fallback	RV64GC	-
`3127410` ( 0.6x )	`574402` ( 1.858 )	`7408` ( 1.121 )	0	NHWC	TVM	Fallback	RV64GC	-
`3127410` ( 0.6x )	`574406` ( 1.858 )	`7408` ( 1.121 )	128	NCHW	TVM	Fallback	RV64GCV	Loop+SLP
`3127410` ( 0.6x )	`574406` ( 1.858 )	`7408` ( 1.121 )	256	NCHW	TVM	Fallback	RV64GCV	Loop+SLP
`3127410` ( 0.6x )	`574406` ( 1.858 )	`7408` ( 1.121 )	512	NCHW	TVM	Fallback	RV64GCV	Loop+SLP
`3127410` ( 0.6x )	`574406` ( 1.858 )	`7408` ( 1.121 )	1024	NCHW	TVM	Fallback	RV64GCV	Loop+SLP
`3127410` ( 0.6x )	`574406` ( 1.858 )	`7408` ( 1.121 )	2048	NCHW	TVM	Fallback	RV64GCV	Loop+SLP
`3127410` ( 0.6x )	`574406` ( 1.858 )	`7408` ( 1.121 )	4096	NCHW	TVM	Fallback	RV64GCV	Loop+SLP
`3127410` ( 0.6x )	`574406` ( 1.858 )	`7408` ( 1.121 )	128	NHWC	TVM	Fallback	RV64GCV	Loop+SLP
`3127410` ( 0.6x )	`574406` ( 1.858 )	`7408` ( 1.121 )	256	NHWC	TVM	Fallback	RV64GCV	Loop+SLP
`3127410` ( 0.6x )	`574406` ( 1.858 )	`7408` ( 1.121 )	512	NHWC	TVM	Fallback	RV64GCV	Loop+SLP
`3127410` ( 0.6x )	`574406` ( 1.858 )	`7408` ( 1.121 )	1024	NHWC	TVM	Fallback	RV64GCV	Loop+SLP
`3127410` ( 0.6x )	`574406` ( 1.858 )	`7408` ( 1.121 )	2048	NHWC	TVM	Fallback	RV64GCV	Loop+SLP
`3127410` ( 0.6x )	`574406` ( 1.858 )	`7408` ( 1.121 )	4096	NHWC	TVM	Fallback	RV64GCV	Loop+SLP
`1995049` ( Base )	`309174` ( Base )	`6608` ( Base )	0	NHWC	muRISCV-NN	Scalar	RV64GC	-
`1995049` ( 1.0x )	`309174` ( 1.0 )	`6608` ( 1.0 )	128	NHWC	muRISCV-NN	Scalar	RV64GCV	Loop+SLP
`1995049` ( 1.0x )	`309174` ( 1.0 )	`6608` ( 1.0 )	256	NHWC	muRISCV-NN	Scalar	RV64GCV	Loop+SLP
`1995047` ( 1.0x )	`309168` ( 1.0 )	`6608` ( 1.0 )	512	NHWC	muRISCV-NN	Scalar	RV64GCV	Loop+SLP
`1995049` ( 1.0x )	`309174` ( 1.0 )	`6608` ( 1.0 )	1024	NHWC	muRISCV-NN	Scalar	RV64GCV	Loop+SLP
`1995049` ( 1.0x )	`309174` ( 1.0 )	`6608` ( 1.0 )	2048	NHWC	muRISCV-NN	Scalar	RV64GCV	Loop+SLP
`1995049` ( 1.0x )	`309174` ( 1.0 )	`6608` ( 1.0 )	4096	NHWC	muRISCV-NN	Scalar	RV64GCV	Loop+SLP
`626638` ( 3.2x )	`310152` ( 1.003 )	`6608` ( 1.0 )	128	NHWC	muRISCV-NN	Vector	RV64GCV	-
`508268` ( 3.9x )	`310146` ( 1.003 )	`6608` ( 1.0 )	256	NHWC	muRISCV-NN	Vector	RV64GCV	-
`449086` ( 4.4x )	`310152` ( 1.003 )	`6608` ( 1.0 )	512	NHWC	muRISCV-NN	Vector	RV64GCV	-
`419830` ( 4.8x )	`310152` ( 1.003 )	`6608` ( 1.0 )	1024	NHWC	muRISCV-NN	Vector	RV64GCV	-
`416146` ( 4.8x )	`310152` ( 1.003 )	`6608` ( 1.0 )	2048	NHWC	muRISCV-NN	Vector	RV64GCV	-
`414262` ( 4.8x )	`310152` ( 1.003 )	`6608` ( 1.0 )	4096	NHWC	muRISCV-NN	Vector	RV64GCV	-

Visual Wake Words (`vww`)

Cycles (Speedup)	Total ROM (rel.)	Total RAM (rel.)	VLEN	Layout	Kernels	Mode	Arch	Auto-Vectorization
`82298726` ( 0.7x )	`535006` ( 1.709 )	`182832` ( 2.089 )	0	NCHW	TVM	Fallback	RV64GC	-
`89553682` ( 0.6x )	`514420` ( 1.644 )	`182832` ( 2.089 )	0	NHWC	TVM	Fallback	RV64GC	-
`82349733` ( 0.7x )	`535046` ( 1.709 )	`182832` ( 2.089 )	128	NCHW	TVM	Fallback	RV64GCV	Loop+SLP
`82349733` ( 0.7x )	`535048` ( 1.709 )	`182832` ( 2.089 )	256	NCHW	TVM	Fallback	RV64GCV	Loop+SLP
`82349733` ( 0.7x )	`535048` ( 1.709 )	`182832` ( 2.089 )	512	NCHW	TVM	Fallback	RV64GCV	Loop+SLP
`82349733` ( 0.7x )	`535046` ( 1.709 )	`182832` ( 2.089 )	1024	NCHW	TVM	Fallback	RV64GCV	Loop+SLP
`82349733` ( 0.7x )	`535048` ( 1.709 )	`182832` ( 2.089 )	2048	NCHW	TVM	Fallback	RV64GCV	Loop+SLP
`82349733` ( 0.7x )	`535048` ( 1.709 )	`182832` ( 2.089 )	4096	NCHW	TVM	Fallback	RV64GCV	Loop+SLP
`89553682` ( 0.6x )	`514420` ( 1.644 )	`182832` ( 2.089 )	128	NHWC	TVM	Fallback	RV64GCV	Loop+SLP
`89553682` ( 0.6x )	`514420` ( 1.644 )	`182832` ( 2.089 )	256	NHWC	TVM	Fallback	RV64GCV	Loop+SLP
`89553682` ( 0.6x )	`514420` ( 1.644 )	`182832` ( 2.089 )	512	NHWC	TVM	Fallback	RV64GCV	Loop+SLP
`89553682` ( 0.6x )	`514420` ( 1.644 )	`182832` ( 2.089 )	1024	NHWC	TVM	Fallback	RV64GCV	Loop+SLP
`89553682` ( 0.6x )	`514420` ( 1.644 )	`182832` ( 2.089 )	2048	NHWC	TVM	Fallback	RV64GCV	Loop+SLP
`89553682` ( 0.6x )	`514420` ( 1.644 )	`182832` ( 2.089 )	4096	NHWC	TVM	Fallback	RV64GCV	Loop+SLP
`55507882` ( Base )	`312994` ( Base )	`87512` ( Base )	0	NHWC	muRISCV-NN	Scalar	RV64GC	-
`55507882` ( 1.0x )	`312996` ( 1.0 )	`87512` ( 1.0 )	128	NHWC	muRISCV-NN	Scalar	RV64GCV	Loop+SLP
`55507882` ( 1.0x )	`312996` ( 1.0 )	`87512` ( 1.0 )	256	NHWC	muRISCV-NN	Scalar	RV64GCV	Loop+SLP
`55507882` ( 1.0x )	`312996` ( 1.0 )	`87512` ( 1.0 )	512	NHWC	muRISCV-NN	Scalar	RV64GCV	Loop+SLP
`55507882` ( 1.0x )	`312996` ( 1.0 )	`87512` ( 1.0 )	1024	NHWC	muRISCV-NN	Scalar	RV64GCV	Loop+SLP
`55507882` ( 1.0x )	`312996` ( 1.0 )	`87512` ( 1.0 )	2048	NHWC	muRISCV-NN	Scalar	RV64GCV	Loop+SLP
`55507882` ( 1.0x )	`312996` ( 1.0 )	`87512` ( 1.0 )	4096	NHWC	muRISCV-NN	Scalar	RV64GCV	Loop+SLP
`13988781` ( 4.0x )	`314668` ( 1.005 )	`87512` ( 1.0 )	128	NHWC	muRISCV-NN	Vector	RV64GCV	-
`10654717` ( 5.2x )	`314668` ( 1.005 )	`87512` ( 1.0 )	256	NHWC	muRISCV-NN	Vector	RV64GCV	-
`9363237` ( 5.9x )	`314668` ( 1.005 )	`87512` ( 1.0 )	512	NHWC	muRISCV-NN	Vector	RV64GCV	-
`8858009` ( 6.3x )	`314668` ( 1.005 )	`87512` ( 1.0 )	1024	NHWC	muRISCV-NN	Vector	RV64GCV	-
`8811008` ( 6.3x )	`314668` ( 1.005 )	`87512` ( 1.0 )	2048	NHWC	muRISCV-NN	Vector	RV64GCV	-
`8811008` ( 6.3x )	`314668` ( 1.005 )	`87512` ( 1.0 )	4096	NHWC	muRISCV-NN	Vector	RV64GCV	-

Original data

Click here to download the raw files for this benchmark.

2024-11-26

TFLM

GCC

O3

Spike (RV32) (spike_rv32)

Spike (RV32, Embedded) (spike_rv32_min)

Spike (RV64) (spike_rv64)

Os

Spike (RV32) (spike_rv32)

Spike (RV32, Embedded) (spike_rv32_min)

Spike (RV64) (spike_rv64)

LLVM

O3

Spike (RV32) (spike_rv32)

Spike (RV32, Embedded) (spike_rv32_min)

Spike (RV64) (spike_rv64)

Os

Spike (RV32) (spike_rv32)

Spike (RV32, Embedded) (spike_rv32_min)

Spike (RV64) (spike_rv64)

TVM

GCC

O3

Spike (RV32) (spike_rv32)

Spike (RV32, Embedded) (spike_rv32_min)

Spike (RV64) (spike_rv64)

Os

Spike (RV32) (spike_rv32)

Spike (RV32, Embedded) (spike_rv32_min)

Spike (RV64) (spike_rv64)

LLVM

O3

Spike (RV32) (spike_rv32)

Spike (RV32, Embedded) (spike_rv32_min)

Spike (RV64) (spike_rv64)

Os

Spike (RV32) (spike_rv32)

Spike (RV32, Embedded) (spike_rv32_min)

Spike (RV64) (spike_rv64)

2024-11-21

TFLM

GCC

O3

Spike (RV32) (spike_rv32)

Spike (RV32, Embedded) (spike_rv32_min)

Spike (RV64) (spike_rv64)

Os

Spike (RV32) (spike_rv32)

Spike (RV32, Embedded) (spike_rv32_min)

Spike (RV64) (spike_rv64)

LLVM

O3

Spike (RV32) (spike_rv32)

Spike (RV32, Embedded) (spike_rv32_min)

Spike (RV64) (spike_rv64)

Os

Spike (RV32) (spike_rv32)

Spike (RV32, Embedded) (spike_rv32_min)

Spike (RV64) (spike_rv64)

TVM

GCC

O3

Spike (RV32) (spike_rv32)

Spike (RV32, Embedded) (spike_rv32_min)

Spike (RV64) (spike_rv64)

Os

Spike (RV32) (spike_rv32)

Spike (RV32, Embedded) (spike_rv32_min)

Spike (RV64) (spike_rv64)

LLVM

O3

Spike (RV32) (spike_rv32)

Spike (RV32, Embedded) (spike_rv32_min)

Spike (RV64) (spike_rv64)

Os

Spike (RV32) (spike_rv32)

Spike (RV32, Embedded) (spike_rv32_min)

Spike (RV64) (spike_rv64)

2024-11-19

TFLM

GCC

Os

Spike (RV32) (spike_rv32)

Spike (RV64) (spike_rv64)

LLVM

Os

Spike (RV32) (spike_rv32)

Spike (RV64) (spike_rv64)

TVM

GCC

Os

Spike (RV32) (spike_rv32)

Spike (RV64) (spike_rv64)

LLVM

Os

Spike (RV32) (spike_rv32)

Spike (RV64) (spike_rv64)

2024-11-18

TFLM

GCC

Os

Spike (RV32) (spike_rv32)

Spike (RV64) (spike_rv64)

LLVM

Os

Spike (RV32) (spike_rv32)

Spike (RV64) (spike_rv64)

TVM

GCC

Os

Spike (RV32) (spike_rv32)

Spike (RV64) (spike_rv64)

LLVM

Os

Spike (RV32) (spike_rv32)

Spike (RV64) (spike_rv64)

2024-07-12

TFLM

GCC

Os

Spike (RV64) (spike_rv64)

LLVM

Os

Spike (RV64) (spike_rv64)

TVM

GCC

Os

Spike (RV64) (spike_rv64)

LLVM

Os

Spike (RV64) (spike_rv64)

2024-06-29

TFLM

GCC

Os

SpikeRV32

LLVM

Os

SpikeRV32

TVM

GCC

Os

SpikeRV32

LLVM

Os

SpikeRV32

2024-03-02

TFLM

GCC

O3

SpikeRV32

Os

SpikeRV32

LLVM

O3

SpikeRV32

Os

SpikeRV32

TVM

GCC

O3

SpikeRV32

Os

SpikeRV32

LLVM

O3

SpikeRV32

Os

SpikeRV32

2024-02-26

TFLM

GCC

s

SpikeRV32

LLVM

s

SpikeRV32

TVM

GCC

s

SpikeRV32

LLVM

s

SpikeRV32

2024-02-23

TFLM

GCC

s

SpikeRV32

LLVM

s

SpikeRV32

TVM

GCC

s

SpikeRV32

LLVM

s

SpikeRV32

2024-02-22

TFLM

GCC

s

SpikeRV32

LLVM

s

SpikeRV32

TVM

GCC

s

SpikeRV32

LLVM

s

SpikeRV32

2024-02-20

TFLM

GCC

s

SpikeRV32

LLVM

s

SpikeRV32

TVM

GCC

s

SpikeRV32

LLVM

s

SpikeRV32

2024-02-11

TFLM

GCC

s

SpikeRV32

LLVM

s

SpikeRV32

TVM

GCC

s

SpikeRV32

LLVM

s

SpikeRV32

2023-12-22

TFLM

GCC

s

SpikeRV32

TVM

GCC

s

SpikeRV32

2024-11-26

TFLM

GCC

O3

Spike (RV32) (spike_rv32)

Spike (RV32, Embedded) (spike_rv32_min)

Spike (RV64) (spike_rv64)

Os

Spike (RV32) (spike_rv32)

Spike (RV32, Embedded) (spike_rv32_min)

Spike (RV64) (spike_rv64)

LLVM

O3

Spike (RV32) (spike_rv32)

Spike (RV32, Embedded) (spike_rv32_min)

Spike (RV64) (spike_rv64)

Os

Spike (RV32) (spike_rv32)

Spike (RV32, Embedded) (spike_rv32_min)

Spike (RV64) (spike_rv64)

TVM

GCC

O3

Spike (RV32) (spike_rv32)

Spike (RV32, Embedded) (spike_rv32_min)

Spike (RV64) (spike_rv64)

Os

Spike (RV32) (spike_rv32)

Spike (RV32, Embedded) (spike_rv32_min)

Spike (RV64) (spike_rv64)

LLVM

O3

Spike (RV32) (spike_rv32)

Spike (RV32, Embedded) (spike_rv32_min)

Spike (RV64) (spike_rv64)

Os

Spike (RV32) (spike_rv32)

Spike (RV32, Embedded) (spike_rv32_min)

Spike (RV64) (spike_rv64)

2024-11-21

TFLM

GCC

O3

Spike (RV32) (spike_rv32)

Spike (RV32, Embedded) (spike_rv32_min)

Spike (RV64) (spike_rv64)

Os

Spike (RV32) (spike_rv32)

Spike (RV32, Embedded) (spike_rv32_min)

Spike (RV64) (spike_rv64)

LLVM

O3

Spike (RV32) (spike_rv32)

Spike (RV32, Embedded) (spike_rv32_min)

Spike (RV64) (spike_rv64)

Os

Spike (RV32) (spike_rv32)

Spike (RV32, Embedded) (spike_rv32_min)

Spike (RV64) (spike_rv64)

TVM

GCC

O3

Spike (RV32) (spike_rv32)

Spike (RV32, Embedded) (spike_rv32_min)

Spike (RV64) (spike_rv64)

Os

Spike (RV32) (spike_rv32)

Spike (RV32, Embedded) (spike_rv32_min)

Spike (RV64) (spike_rv64)

LLVM

O3

Spike (RV32) (spike_rv32)

Spike (RV32, Embedded) (spike_rv32_min)

Spike (RV64) (spike_rv64)

Os

Spike (RV32) (spike_rv32)

Spike (RV32, Embedded) (spike_rv32_min)

Spike (RV64) (spike_rv64)

2024-11-19

TFLM

GCC

Os

Spike (RV32) (spike_rv32)

Spike (RV64) (spike_rv64)

LLVM

Os

Spike (RV32) (spike_rv32)

Spike (RV64) (spike_rv64)

TVM

GCC

Os

Spike (RV32) (spike_rv32)

Spike (RV64) (spike_rv64)

LLVM

Os

Spike (RV32) (spike_rv32)

Spike (RV64) (spike_rv64)

2024-11-18

TFLM

GCC

Os

Spike (RV32) (spike_rv32)

Spike (RV64) (spike_rv64)

LLVM

Os

Spike (RV32) (spike_rv32)

Spike (RV64) (spike_rv64)

TVM

GCC

Os

Spike (RV32) (spike_rv32)

Spike (RV64) (spike_rv64)

LLVM

Os

Spike (RV32) (spike_rv32)

Spike (RV64) (spike_rv64)

2024-07-12

TFLM

GCC

Os

Spike (RV64) (spike_rv64)

LLVM

Os

Spike (RV64) (spike_rv64)

TVM

GCC

Os

Spike (RV64) (spike_rv64)

LLVM

Os

Spike (RV64) (spike_rv64)

2024-06-29

TFLM

GCC

Os

SpikeRV32

LLVM

Os

SpikeRV32

TVM

GCC

Os

SpikeRV32

LLVM

Os

SpikeRV32

2024-03-02

TFLM

GCC

O3

SpikeRV32

Os

SpikeRV32

LLVM

O3

SpikeRV32

Os

SpikeRV32

TVM

GCC

O3

SpikeRV32

Os

SpikeRV32

LLVM

O3

SpikeRV32

Os

SpikeRV32

2024-02-26

TFLM

GCC

s

SpikeRV32

LLVM

s

SpikeRV32

TVM

GCC

s

SpikeRV32

LLVM

s

SpikeRV32

2024-02-23

TFLM

GCC

s

SpikeRV32

LLVM

s

SpikeRV32

TVM

GCC

s

SpikeRV32

LLVM

s

SpikeRV32

2024-02-22

TFLM

GCC

s

SpikeRV32

LLVM

s

SpikeRV32

TVM

GCC

s

SpikeRV32

LLVM

s

SpikeRV32

2024-02-20

TFLM

GCC

s

SpikeRV32

LLVM

s

SpikeRV32

TVM

GCC

s

SpikeRV32

LLVM

s

SpikeRV32

2024-02-11

TFLM

GCC

s

SpikeRV32

LLVM

s

SpikeRV32

TVM

GCC

s

SpikeRV32

LLVM

s

SpikeRV32

2023-12-22

TFLM

GCC

s

SpikeRV32

TVM

GCC

s

SpikeRV32

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Benchmarks 2024 11 18 TVM GCC Os spike_rv64

Setup

Simulator

Toolchains

Models

Frameworks

Miscellaneous

Results (Framework: tvm, Backend: tvmaot, Toolchain: gcc, Flags: -Os, Target: spike_rv64 )

Audio Wake Words (`aww`)

Image Classification (`resnet`)

Anomaly Detection (`toycar`)

Visual Wake Words (`vww`)

Original data

Clone this wiki locally

Benchmarks 2024 11 18 TVM GCC Os spike_rv64

Setup

Simulator

Toolchains

Models

Frameworks

Miscellaneous

Results (Framework: tvm, Backend: tvmaot, Toolchain: gcc, Flags: -Os, Target: spike_rv64 )

Audio Wake Words (aww)

Image Classification (resnet)

Anomaly Detection (toycar)

Visual Wake Words (vww)

Original data

Clone this wiki locally

Audio Wake Words (`aww`)

Image Classification (`resnet`)

Anomaly Detection (`toycar`)

Visual Wake Words (`vww`)