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Jul 9, 2018 - VHDL
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digital-circuits
Here are 15 public repositories matching this topic...
This repository showcases various projects developed on the DE10-Lite board (Intel MAX 10 FPGA) using Quartus Prime Lite software. The projects primarily focus on Finite State Machines (FSMs) and communication protocols, implemented in VHDL. Each project includes HDL code, testbenches, simulations, and qsf files for pin assignments.
microcontroller fsm dsp vhdl verification gtkwave testbenches verilog-hdl digital-circuits pin-assignment uart-vhdl qsf rtl-simulations ip-cores
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Sep 6, 2024 - VHDL
Optimizing AES key generation routine in VHDL.
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Mar 8, 2017 - VHDL
INE5406 - Digital Systems
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Jun 7, 2018 - VHDL
Projects for course <Analog & Digital Circuits Lab>
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Mar 13, 2019 - VHDL
Digital Circuits Design Project (PoliMi, year 2022) - Memory Interaction
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Mar 2, 2024 - VHDL
Lab exercises on digital circuit design using Altera Quartus 9.1sp2
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Jan 31, 2022 - VHDL
Esse é o projeto final da disciplina de Circuitos e Técnicas Digitais, ofertada pelo departamento de Engenharia Elétrica da UFSC. Ele consiste em programar uma FPGA para rodar o jogo mastermind.
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Jun 12, 2024 - VHDL
Implementação de um circuito verificador de senhas em VHDL
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Apr 28, 2018 - VHDL
Working-zone encoding: Digital Devices Project, Final Examination 2019/2020 - Politecnico di Milano
encoding performance fpga hardware vhdl low-level digital-circuits digital-circuit-design working-zone hardware-design digital-devices working-zone-encoding
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Jul 6, 2023 - VHDL
This repository showcases various projects developed on the DE10-Lite board (Intel MAX 10 FPGA) using Quartus Prime Lite software. Each project includes HDL code, testbenches, simulations, and pin assignments, providing a comprehensive view of the FPGA design process.
fsm fpga microcontrollers dsp vhdl verification uart testbenches verilog-hdl digital-circuits quartus pin-assignment qsf communication-protocols rtl-simulations gtk-wave ip-cores
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Sep 6, 2024 - VHDL
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Oct 21, 2017 - VHDL
This VHDL code describes the architecture of a simplified Central Processing Unit (CPU). The CPU is capable of executing basic instructions stored in ROM, using an accumulator (ACC) and an Arithmetic Logic Unit (ALU) for arithmetic and logical operations. It uses a Harvard bus architecture.
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Oct 9, 2024 - VHDL
Digital circuit for CRC-8 AutoSar based implementation
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Dec 9, 2020 - VHDL
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