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Software based Concurrent Scavenge support on P #3421
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Hi @gita-omr Assuming we will need some documentation to support this. Please add doc:externals label to this and open an issue at openj9-docs repo: https://github.com/eclipse/openj9-docs/issues/new?template=new-documentation-change.md so we can plan for this in the 0.12.0 list. |
An update: |
The NULLCHK issue will be fixed with #3798. |
@IBMJimmyk found another common code issue: eclipse-omr/omr#3440 |
@pshipton : @IBMJimmyk made some cosmetic changes after another code review and we would like to run more tests. They will be done by Monday morning. Could the code split wait for that? |
Yes, since we got not much delivered today because of the Jenkins issues it seems we need to delay another day. |
Deferred to the next release. |
@pshipton we are ready to deliver it to 0.13. |
@gita-omr when do you expect the merges to occur? |
Sets OMR_GC_CONCURRENT_SCAVENGER in the configure files to enable concurrent scavenge. Modifies mminit.cpp to be able to set softwareRangeCheckReadBarrier to true to enable software based concurrent scavenge. Implemented irdbarEvaluator and ardbarEvaluator which are used to handle loads that might need to call out to the readbarrier under Concurrent Scavenge GC policy. Updated VMinlineCompareAndSwapObject to be aware of the possiblity of calling out to the read barrier under Concurrent Scavenge GC policy. Implemented a new version of arraycopyEvaluator for reference array copies that calls out to the referenceArrayCopy if current scavenge is currently happening. Added jitReadBarrier and jitReferenceArrayCopy as helpers to call out to J9ReadBarrier and referenceArrayCopy. Updated thisThreadGetConcurrentScavengeActiveByteAddressOffset and thisThreadGetEvacuateBaseAddressOffset to recognize Power as well as X86. Updated insertPrefetchIfNecessary to recognize the irdbari opcode. Updated copyright dates on modified files. TM is current not compatible with read barriers. This change will disable TM if read barriers are needed. Issue: eclipse-openj9#3421 Signed-off-by: jimmyk <jimmyk@ca.ibm.com>
Just merged #4159 |
Comment regarding compatibility of TM and concurrent scavenge was updated. At the current time there are no plans to be able to support both at the time time so it was removed as being a TODO. stopUsingRegister already performs a NULL check on the register so the NULL checks before the calls were unnecessary. Issue: eclipse-openj9#3421 Signed-off-by: jimmyk <jimmyk@ca.ibm.com>
Sets OMR_GC_CONCURRENT_SCAVENGER in the configure files to enable concurrent scavenge. Modifies mminit.cpp to be able to set softwareRangeCheckReadBarrier to true to enable software based concurrent scavenge. Implemented irdbarEvaluator and ardbarEvaluator which are used to handle loads that might need to call out to the readbarrier under Concurrent Scavenge GC policy. Updated VMinlineCompareAndSwapObject to be aware of the possiblity of calling out to the read barrier under Concurrent Scavenge GC policy. Implemented a new version of arraycopyEvaluator for reference array copies that calls out to the referenceArrayCopy if current scavenge is currently happening. Added jitReadBarrier and jitReferenceArrayCopy as helpers to call out to J9ReadBarrier and referenceArrayCopy. Updated thisThreadGetConcurrentScavengeActiveByteAddressOffset and thisThreadGetEvacuateBaseAddressOffset to recognize Power as well as X86. Updated insertPrefetchIfNecessary to recognize the irdbari opcode. Updated copyright dates on modified files. TM is current not compatible with read barriers. This change will disable TM if read barriers are needed. Issue: eclipse-openj9#3421 Signed-off-by: jimmyk <jimmyk@ca.ibm.com>
@gita-omr are we still ok for 0.13.0 ? |
@gita-omr is this now moved to 0.14.0 please? |
No, it's in 0.13. We generally try to keep milestone field up to date. |
Sorry, just noticed @vij-singh question. This is definitely in 0.13. |
@gita-omr - please can you revisit the docs issue you created a while back (eclipse-openj9/openj9-docs#134) to see if you can provide any further information. It implies that the info will be similar to that for z, except that is definitely moved in to 0.14. Thanks! |
Yeah, I meant that the description of software-based CS is the same on Intel, Power, Z (if enabled). As of 0.13 it will be enabled on Intel and Power. Let me review the docs once again to make sure they are up to date in terms of which platform the feature is being enabled. |
@gita-omr can this Issue be closed now? |
Yes, I just should not that we enabled this on Power Linux LE and AIX. We will open an issue for 0.14 for software-based CS on Linux BE. I will update documentation accordingly. |
The software based read barrier solution for pauseless GC on P
Related issue for Z: #3276
Doc issue eclipse-openj9/openj9-docs#134
Pull requests:
#4159
#4712
Dependencies:
#3453
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