Add nRF9161 SoC variant to CTCC board

boards/ct/ctcc/Kconfig.ctcc

@@ -5,3 +5,4 @@
 
 config BOARD_CTCC
 	select SOC_NRF52840_QIAA if BOARD_CTCC_NRF52840
+	select SOC_NRF9161_LACA if BOARD_CTCC_NRF9161 || BOARD_CTCC_NRF9161_NS

boards/ct/ctcc/Kconfig.defconfig

@@ -53,3 +53,24 @@ endif # USB_DEVICE_STACK
 endif # BOARD_SERIAL_BACKEND_CDC_ACM
 
 endif # BOARD_CTCC_NRF52840
+
+if BOARD_CTCC_NRF9161 || BOARD_CTCC_NRF9161_NS
+
+# Workaround for not being able to have commas in macro arguments.
+# For explanation please see: boards/nordic/nrf9161dk/Kconfig.defconfig
+DT_CHOSEN_Z_CODE_PARTITION := zephyr,code-partition
+
+config FLASH_LOAD_SIZE
+	default $(dt_chosen_reg_size_hex,$(DT_CHOSEN_Z_CODE_PARTITION))
+	depends on BOARD_CTCC_NRF9161 && TRUSTED_EXECUTION_SECURE
+
+if BOARD_CTCC_NRF9161_NS
+
+config FLASH_LOAD_OFFSET
+	default $(dt_chosen_reg_addr_hex,$(DT_CHOSEN_Z_CODE_PARTITION))
+
+config FLASH_LOAD_SIZE
+	default $(dt_chosen_reg_size_hex,$(DT_CHOSEN_Z_CODE_PARTITION))
+
+endif # BOARD_CTCC_NRF9161_NS
+endif # BOARD_CTCC_NRF9161 || BOARD_CTCC_NRF9161_NS

boards/ct/ctcc/board.cmake

@@ -1,6 +1,19 @@
 # SPDX-License-Identifier: Apache-2.0
 
-board_runner_args(nrfjprog "--softreset")
-board_runner_args(pyocd "--target=nrf52840" "--frequency=4000000")
-include(${ZEPHYR_BASE}/boards/common/nrfjprog.board.cmake)
-include(${ZEPHYR_BASE}/boards/common/pyocd.board.cmake)
+if(CONFIG_BOARD_CTCC_NRF52840)
+  board_runner_args(nrfjprog "--softreset")
+  board_runner_args(pyocd "--target=nrf52840" "--frequency=4000000")
+  include(${ZEPHYR_BASE}/boards/common/nrfjprog.board.cmake)
+  include(${ZEPHYR_BASE}/boards/common/pyocd.board.cmake)
+elseif(CONFIG_BOARD_CTCC_NRF9161 OR CONFIG_BOARD_CTCC_NRF9161_NS)
+  if(CONFIG_BOARD_CTCC_NRF9161_NS)
+    set(TFM_PUBLIC_KEY_FORMAT "full")
+  endif()
+  if(CONFIG_TFM_FLASH_MERGED_BINARY)
+    set_property(TARGET runners_yaml_props_target PROPERTY hex_file tfm_merged.hex)
+  endif()
+  board_runner_args(nrfjprog "--softreset")
+  board_runner_args(pyocd "--target=nrf9161" "--frequency=4000000")
+  include(${ZEPHYR_BASE}/boards/common/nrfjprog.board.cmake)
+  include(${ZEPHYR_BASE}/boards/common/pyocd.board.cmake)
+endif()

boards/ct/ctcc/board.yml

@@ -1,5 +1,8 @@
 board:
   name: ctcc
-  full_name: Connectivity Card nRF52840
+  full_name: CTHINGS.CO Connectivity Card
   socs:
     - name: nrf52840
+    - name: nrf9161
+      variants:
+        - name: 'ns'

boards/ct/ctcc/ctcc_nrf52840.dts

@@ -69,6 +69,10 @@
 	};
 };
 
+&reg0 {
+	status = "okay";
+};
+
 &reg1 {
 	regulator-initial-mode = <NRF5X_REG_MODE_DCDC>;
 };

boards/ct/ctcc/ctcc_nrf52840.yaml

@@ -11,4 +11,5 @@ supported:
   - gpio
   - usb_device
   - watchdog
+  - counter
 vendor: ct

boards/ct/ctcc/ctcc_nrf9161-pinctrl.dtsi

@@ -0,0 +1,67 @@
+/*
+ * Copyright (c) 2024 CTHINGS.CO
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+&pinctrl {
+	uart0_default: uart0_default {
+		group1 {
+			psels = <NRF_PSEL(UART_TX, 0, 28)>,
+				<NRF_PSEL(UART_RTS, 0, 14)>;
+		};
+		group2 {
+			psels = <NRF_PSEL(UART_RX, 0, 29)>,
+				<NRF_PSEL(UART_CTS, 0, 15)>;
+		};
+	};
+
+	uart0_sleep: uart0_sleep {
+		group1 {
+			psels = <NRF_PSEL(UART_TX, 0, 28)>,
+				<NRF_PSEL(UART_RX, 0, 29)>,
+				<NRF_PSEL(UART_RTS, 0, 14)>,
+				<NRF_PSEL(UART_CTS, 0, 15)>;
+			low-power-enable;
+		};
+	};
+
+	uart1_default: uart1_default {
+		group1 {
+			psels = <NRF_PSEL(UART_TX, 0, 27)>,
+				<NRF_PSEL(UART_RTS, 0, 16)>;
+		};
+		group2 {
+			psels = <NRF_PSEL(UART_RX, 0, 26)>,
+				<NRF_PSEL(UART_CTS, 0, 17)>;
+			bias-pull-up;
+		};
+	};
+
+	uart1_sleep: uart1_sleep {
+		group1 {
+			psels = <NRF_PSEL(UART_TX, 0, 27)>,
+				<NRF_PSEL(UART_RX, 0, 26)>,
+				<NRF_PSEL(UART_RTS, 0, 16)>,
+				<NRF_PSEL(UART_CTS, 0, 17)>;
+			low-power-enable;
+		};
+	};
+
+	spi3_default: spi3_default {
+		group1 {
+			psels = <NRF_PSEL(SPIM_SCK, 0, 3)>,
+				<NRF_PSEL(SPIM_MISO, 0, 5)>,
+				<NRF_PSEL(SPIM_MOSI, 0, 4)>;
+			nordic,drive-mode = <NRF_DRIVE_H0H1>;
+		};
+	};
+
+	spi3_sleep: spi3_sleep {
+		group1 {
+			psels = <NRF_PSEL(SPIM_SCK, 0, 3)>,
+				<NRF_PSEL(SPIM_MISO, 0, 5)>,
+				<NRF_PSEL(SPIM_MOSI, 0, 4)>;
+			low-power-enable;
+		};
+	};
+};

boards/ct/ctcc/ctcc_nrf9161.dts

@@ -0,0 +1,19 @@
+/*
+ * Copyright (c) 2024 CTHINGS.CO
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/dts-v1/;
+#include <nordic/nrf9161_laca.dtsi>
+#include "ctcc_nrf9161_common.dtsi"
+
+/ {
+	chosen {
+		zephyr,sram = &sram0_s;
+		zephyr,flash = &flash0;
+		zephyr,code-partition = &slot0_partition;
+		zephyr,sram-secure-partition = &sram0_s;
+		zephyr,sram-non-secure-partition = &sram0_ns;
+	};
+};

boards/ct/ctcc/ctcc_nrf9161.yaml

@@ -0,0 +1,15 @@
+identifier: ctcc/nrf9161
+name: CTHINGS.CO Connectivity Card nRF9161
+type: mcu
+arch: arm
+toolchain:
+  - zephyr
+  - gnuarmemb
+  - xtools
+ram: 88
+flash: 1024
+supported:
+  - gpio
+  - watchdog
+  - counter
+vendor: ct

boards/ct/ctcc/ctcc_nrf9161_common.dtsi

@@ -0,0 +1,91 @@
+/*
+ * Copyright (c) 2024 CTHINGS.CO
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "ctcc_nrf9161-pinctrl.dtsi"
+#include <zephyr/dt-bindings/input/input-event-codes.h>
+
+/ {
+	model = "CTHINGS.CO Connectivity Card nRF9161";
+	compatible = "ct,ctcc-nrf9161";
+
+	chosen {
+		zephyr,console = &uart0;
+		zephyr,shell-uart = &uart0;
+		zephyr,uart-mcumgr = &uart0;
+	};
+
+	leds {
+		 compatible = "gpio-leds";
+		 led1: led_1 {
+			 gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
+			 label = "LED 1";
+		 };
+		 led2: led_2 {
+			 gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
+			 label = "LED 2";
+		 };
+	};
+
+	aliases {
+		led0 = &led1;
+		led1 = &led2;
+		mcuboot-led0 = &led1;
+		bootloader-led0 = &led1;
+		watchdog0 = &wdt0;
+		spi-flash0 = &mx25r6435;
+	};
+};
+
+&adc {
+	status = "okay";
+};
+
+&gpiote {
+	status = "okay";
+};
+
+&gpio0 {
+	status = "okay";
+};
+
+&uart0 {
+	status = "okay";
+	current-speed = <115200>;
+	pinctrl-0 = <&uart0_default>;
+	pinctrl-1 = <&uart0_sleep>;
+	pinctrl-names = "default", "sleep";
+};
+
+&uart1 {
+	status = "okay";
+	current-speed = <115200>;
+	pinctrl-0 = <&uart1_default>;
+	pinctrl-1 = <&uart1_sleep>;
+	pinctrl-names = "default", "sleep";
+};
+
+&spi3 {
+	compatible = "nordic,nrf-spim";
+	status = "okay";
+	cs-gpios = <&gpio0 16 GPIO_ACTIVE_LOW>;
+	pinctrl-0 = <&spi3_default>;
+	pinctrl-1 = <&spi3_sleep>;
+	pinctrl-names = "default", "sleep";
+
+	mx25r6435: mx25r6435fm2il0@0 {
+		compatible = "jedec,spi-nor";
+		status = "disabled";
+		reg = <0>;
+		spi-max-frequency = <10000000>;
+		size = <DT_SIZE_M(64)>;
+		has-dpd;
+		dpd-wakeup-sequence = <30000>, <20>, <30000>;
+		jedec-id = [c2 25 38];
+	};
+};
+
+/* Include default memory partition configuration file */
+#include <common/nordic/nrf91xx_partition.dtsi>

boards/ct/ctcc/ctcc_nrf9161_defconfig

@@ -0,0 +1,20 @@
+# SPDX-License-Identifier: Apache-2.0
+
+# Enable MPU
+CONFIG_ARM_MPU=y
+
+# Enable hardware stack protection
+CONFIG_HW_STACK_PROTECTION=y
+
+# Enable TrustZone-M
+CONFIG_ARM_TRUSTZONE_M=y
+
+# Enable GPIO
+CONFIG_GPIO=y
+
+# Enable UART driver
+CONFIG_SERIAL=y
+
+# Enable console
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y

boards/ct/ctcc/ctcc_nrf9161_ns.dts

@@ -0,0 +1,22 @@
+/*
+ * Copyright (c) 2024 CTHINGS.CO
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/dts-v1/;
+#include <nordic/nrf9161ns_laca.dtsi>
+#include "ctcc_nrf9161_common.dtsi"
+
+/ {
+	chosen {
+		zephyr,flash = &flash0;
+		zephyr,sram = &sram0_ns;
+		zephyr,code-partition = &slot0_ns_partition;
+	};
+};
+
+/* Disable UART1, because it is used by default in TF-M */
+&uart1 {
+	status = "disabled";
+};

boards/ct/ctcc/ctcc_nrf9161_ns.yaml

@@ -0,0 +1,14 @@
+identifier: ctcc/nrf9161/ns
+name: CTHINGS.CO Connectivity Card nRF9161 Non Secure
+type: mcu
+arch: arm
+toolchain:
+  - zephyr
+  - gnuarmemb
+  - xtools
+ram: 128
+flash: 192
+supported:
+  - gpio
+  - watchdog
+vendor: ct

boards/ct/ctcc/ctcc_nrf9161_ns_defconfig

@@ -0,0 +1,23 @@
+# SPDX-License-Identifier: Apache-2.0
+
+# Enable MPU
+CONFIG_ARM_MPU=y
+
+# Enable hardware stack protection
+CONFIG_HW_STACK_PROTECTION=y
+
+# Enable TrustZone-M
+CONFIG_ARM_TRUSTZONE_M=y
+
+# This board implies building Non-Secure firmware
+CONFIG_TRUSTED_EXECUTION_NONSECURE=y
+
+# Enable GPIO
+CONFIG_GPIO=y
+
+# Enable UART driver
+CONFIG_SERIAL=y
+
+# Enable console
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y