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Disable verilator builds of Ara
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jerryz123 committed Aug 7, 2024
1 parent d4b6d4e commit 40369c5
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Showing 3 changed files with 6 additions and 27 deletions.
7 changes: 4 additions & 3 deletions .github/scripts/run-tests.sh
Original file line number Diff line number Diff line change
Expand Up @@ -142,11 +142,12 @@ case $1 in
run_binary BINARY=$RISCV/riscv64-unknown-elf/share/riscv-tests/benchmarks/vec-memcpy.riscv LOADMEM=1
;;
chipyard-shuttleara)
run_binary BINARY=$RISCV/riscv64-unknown-elf/share/riscv-tests/benchmarks/vec-sgemm.riscv LOADMEM=1
# Ara does not work with verilator
# run_binary BINARY=$RISCV/riscv64-unknown-elf/share/riscv-tests/benchmarks/vec-sgemm.riscv LOADMEM=1
# Ara cannot run strcmp
# run_binary BINARY=$RISCV/riscv64-unknown-elf/share/riscv-tests/benchmarks/vec-strcmp.riscv LOADMEM=1
run_binary BINARY=$RISCV/riscv64-unknown-elf/share/riscv-tests/benchmarks/vec-daxpy.riscv LOADMEM=1
run_binary BINARY=$RISCV/riscv64-unknown-elf/share/riscv-tests/benchmarks/vec-memcpy.riscv LOADMEM=1
# run_binary BINARY=$RISCV/riscv64-unknown-elf/share/riscv-tests/benchmarks/vec-daxpy.riscv LOADMEM=1
# run_binary BINARY=$RISCV/riscv64-unknown-elf/share/riscv-tests/benchmarks/vec-memcpy.riscv LOADMEM=1
;;
tracegen)
run_tracegen
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24 changes: 0 additions & 24 deletions .github/workflows/chipyard-run-tests.yml
Original file line number Diff line number Diff line change
Expand Up @@ -844,29 +844,6 @@ jobs:
group-key: "group-accels"
project-key: "chipyard-shuttlevector"

chipyard-shuttleara-run-tests:
name: chipyard-shuttleara-run-tests
needs: prepare-chipyard-accels
runs-on: as4
steps:
- name: Delete old checkout
run: |
ls -alh .
rm -rf ${{ github.workspace }}/* || true
rm -rf ${{ github.workspace }}/.* || true
ls -alh .
- name: Checkout
uses: actions/checkout@v3
- name: Git workaround
uses: ./.github/actions/git-workaround
- name: Create conda env
uses: ./.github/actions/create-conda-env
- name: Run tests
uses: ./.github/actions/run-tests
with:
group-key: "group-accels"
project-key: "chipyard-shuttleara"

chipyard-gemmini-run-tests:
name: chipyard-gemmini-run-tests
needs: prepare-chipyard-accels
Expand Down Expand Up @@ -1259,7 +1236,6 @@ jobs:
chipyard-rerocc-run-tests,
chipyard-rocketvector-run-tests,
chipyard-shuttlevector-run-tests,
chipyard-shuttleara-run-tests,
chipyard-gemmini-run-tests,
chipyard-manymmioaccels-run-tests, # chipyard-nvdla-run-tests,
chipyard-prefetchers-run-tests,
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2 changes: 2 additions & 0 deletions docs/Generators/Ara.rst
Original file line number Diff line number Diff line change
Expand Up @@ -9,6 +9,8 @@ Example Ara configurations are listed in ``generators/chipyard/src/main/scala/co

To compile simulators using Ara, you must pass an additional ``USE_ARA`` flag to the makefile.

.. Note:: Ara only supports VCS for simulation

.. code-block:: shell
make CONFIG=V4096Ara2LaneRocketConfig USE_ARA=1

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