VHDL projects for combinational and sequential logic design on FPGA.
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Updated
Dec 18, 2024 - VHDL
VHDL projects for combinational and sequential logic design on FPGA.
Implemented some functionalities for the existing DBMS.
This is a simple SR Latch using the OR , AND and NOT gates . Basically it is OR-AND latch
Verilog codes for sequential circuits
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