A simple "database" that use JSON file for Node.JS.

loxilb ebpf sub-module

A Hybrid Framework to Build High-performance Adaptive Neural Networks for Kernel Datapath

A 32-bit MIPS processor used Altera Quartus II with Verilog.

Repositório para as aulas, exercícios e resumos da matéria: organização e arquitetura de computadores (INE5607).

Design and implementation of a complete ARM based CPU.

simulating connection of micro processor and accelerator on a bus context with systemc language

Assignment from the Advanced Computer Architecture class.

北京邮电大学 2023-2024 春季学期《计算机组成原理》课程实验集合

CSE-306-Computer-Architecture Offline / Assignment on ALU, Floating Point Adder and 8 bit MIPS Datapath along with pipelining

Finite state machine controlled RISC machine

MIPS Multicycle CPU design in Verilog

Calculadora eletrônica feita no simulador Circuit Verse, realiza soma de 2 números de 0 a 99, conversão bin2dec e dec2bin.

This is a website for demonstration of how most of the basic instructions work in MIPS architecture

Interactive CPU Datapath Simulator made to educate students on the MIPS architecture

A Datapath design which able to execute store operation as memory instruction, substraction and or operations as arithmetic instruction by Logisim. Additional explanations in readme.

1052_計算機組織 COMPUTER ORGANIZATION

Car system to signal a wheel punctured on display developed in SIS