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Merge pull request #28 from reitermarkus/critical-section
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Use `critical_section` crate.
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Disasm authored Nov 23, 2023
2 parents 6bed82a + d2b86ea commit 255b040
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Showing 6 changed files with 34 additions and 36 deletions.
15 changes: 6 additions & 9 deletions .github/workflows/ci.yml
Original file line number Diff line number Diff line change
Expand Up @@ -23,14 +23,11 @@ jobs:
with:
toolchain: ${{ matrix.rust }}

- name: Check code (cortex-m fs)
run: cargo check --features "cortex-m fs"
- name: Check code (fs)
run: cargo check --features fs

- name: Check code (cortex-m hs)
run: cargo check --features "cortex-m hs"
- name: Check code (hs)
run: cargo check --features hs

- name: Check code (cortex-m hs xcvrdly)
run: cargo check --features "cortex-m hs xcvrdly"

- name: Check code (riscv fs)
run: cargo check --features "riscv fs"
- name: Check code (hs xcvrdly)
run: cargo check --features "hs xcvrdly"
7 changes: 7 additions & 0 deletions CHANGELOG.md
Original file line number Diff line number Diff line change
Expand Up @@ -7,9 +7,16 @@ and this project adheres to [Semantic Versioning](http://semver.org/spec/v2.0.0.

## [Unreleased]


### Changed

* Use `critical-section` crate for critical sections.


## [v0.4.0] - 2023-11-18

### Changed

* `usb-device` version bumped to v0.3.0


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5 changes: 2 additions & 3 deletions Cargo.toml
Original file line number Diff line number Diff line change
Expand Up @@ -10,14 +10,13 @@ readme = "README.md"
keywords = ["no-std", "embedded", "usb"]

[dependencies]
riscv = { version = "0.6.0", optional = true }
cortex-m = { version = "0.7.0", optional = true }
critical-section = "1.0"
embedded-hal = "0.2.4"
vcell = "0.1.0"
usb-device = "0.3"

[package.metadata.docs.rs]
features = ['cortex-m', 'fs']
features = ['fs']

[features]
hs = []
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22 changes: 11 additions & 11 deletions src/bus.rs
Original file line number Diff line number Diff line change
Expand Up @@ -3,14 +3,14 @@ use crate::ral::{
};
use crate::transition::{EndpointConfig, EndpointDescriptor};
use core::marker::PhantomData;
use critical_section::{CriticalSection, Mutex};
use embedded_hal::blocking::delay::DelayMs;
use usb_device::bus::{PollResult, UsbBusAllocator};
use usb_device::endpoint::{EndpointAddress, EndpointType};
use usb_device::{Result, UsbDirection, UsbError};

use crate::endpoint::{EndpointIn, EndpointOut};
use crate::endpoint_memory::{EndpointBufferState, EndpointMemoryAllocator};
use crate::target::interrupt::{self, CriticalSection, Mutex};
use crate::target::UsbRegisters;
use crate::{PhyType, UsbPeripheral};

Expand All @@ -37,7 +37,7 @@ impl<USB: UsbPeripheral> UsbBus<USB> {
self.peripheral
}

fn configure_all(&self, cs: &CriticalSection) {
fn configure_all(&self, cs: CriticalSection<'_>) {
let regs = self.regs.borrow(cs);

// Rx FIFO
Expand Down Expand Up @@ -111,7 +111,7 @@ impl<USB: UsbPeripheral> UsbBus<USB> {
}
}

fn deconfigure_all(&self, cs: &CriticalSection) {
fn deconfigure_all(&self, cs: CriticalSection<'_>) {
let regs = self.regs.borrow(cs);

// disable interrupts
Expand All @@ -131,7 +131,7 @@ impl<USB: UsbPeripheral> UsbBus<USB> {
}

pub fn force_reset(&self, delay: &mut impl DelayMs<u32>) -> Result<()> {
interrupt::free(|cs| {
critical_section::with(|cs| {
let regs = self.regs.borrow(cs);
write_reg!(otg_device, regs.device(), DCTL, SDIS: 1); // Soft disconnect
delay.delay_ms(3);
Expand Down Expand Up @@ -165,7 +165,7 @@ impl<USB: UsbPeripheral> UsbBus<USB> {
panic!("ulpi_read is only supported with external ULPI PHYs");
}

interrupt::free(|cs| {
critical_section::with(|cs| {
let regs = self.regs.borrow(cs);

// Begin ULPI register read transaction
Expand Down Expand Up @@ -200,7 +200,7 @@ impl<USB: UsbPeripheral> UsbBus<USB> {
panic!("ulpi_write is only supported with external ULPI PHYs");
}

interrupt::free(|cs| {
critical_section::with(|cs| {
let regs = self.regs.borrow(cs);

// Begin ULPI register write transaction
Expand Down Expand Up @@ -367,7 +367,7 @@ impl<USB: UsbPeripheral> usb_device::bus::UsbBus for UsbBus<USB> {
// Enable USB_OTG in RCC
USB::enable();

interrupt::free(|cs| {
critical_section::with(|cs| {
let regs = self.regs.borrow(cs);

let core_id = read_reg!(otg_global, regs.global(), CID);
Expand Down Expand Up @@ -517,7 +517,7 @@ impl<USB: UsbPeripheral> usb_device::bus::UsbBus for UsbBus<USB> {
}

fn reset(&self) {
interrupt::free(|cs| {
critical_section::with(|cs| {
let regs = self.regs.borrow(cs);

self.configure_all(cs);
Expand All @@ -527,7 +527,7 @@ impl<USB: UsbPeripheral> usb_device::bus::UsbBus for UsbBus<USB> {
}

fn set_device_address(&self, addr: u8) {
interrupt::free(|cs| {
critical_section::with(|cs| {
let regs = self.regs.borrow(cs);

modify_reg!(otg_device, regs.device(), DCFG, DAD: addr as u32);
Expand Down Expand Up @@ -584,7 +584,7 @@ impl<USB: UsbPeripheral> usb_device::bus::UsbBus for UsbBus<USB> {
}

fn poll(&self) -> PollResult {
interrupt::free(|cs| {
critical_section::with(|cs| {
let regs = self.regs.borrow(cs);

let core_id = read_reg!(otg_global, regs.global(), CID);
Expand Down Expand Up @@ -703,7 +703,7 @@ impl<USB: UsbPeripheral> usb_device::bus::UsbBus for UsbBus<USB> {

if status == 0x02 || status == 0x06 {
if let Some(ep) = &self.allocator.endpoints_out[epnum as usize] {
let mut buffer = ep.buffer.borrow(cs).borrow_mut();
let mut buffer = ep.buffer.borrow_ref_mut(cs);
if buffer.state() == EndpointBufferState::Empty {
read_reg!(otg_global, regs.global(), GRXSTSP); // pop GRXSTSP

Expand Down
16 changes: 8 additions & 8 deletions src/endpoint.rs
Original file line number Diff line number Diff line change
@@ -1,16 +1,16 @@
use crate::endpoint_memory::{EndpointBuffer, EndpointBufferState};
use crate::ral::{endpoint0_out, endpoint_in, endpoint_out, modify_reg, read_reg, write_reg};
use crate::target::interrupt::{self, CriticalSection, Mutex};
use crate::target::{fifo_write, UsbRegisters};
use crate::transition::EndpointDescriptor;
use crate::UsbPeripheral;
use core::cell::RefCell;
use core::ops::{Deref, DerefMut};
use critical_section::{CriticalSection, Mutex};
use usb_device::endpoint::EndpointAddress;
use usb_device::{Result, UsbDirection, UsbError};

pub fn set_stalled(usb: UsbRegisters, address: EndpointAddress, stalled: bool) {
interrupt::free(|_| match address.direction() {
critical_section::with(|_| match address.direction() {
UsbDirection::Out => {
let ep = usb.endpoint_out(address.index() as usize);
modify_reg!(endpoint_out, ep, DOEPCTL, STALL: stalled as u32);
Expand Down Expand Up @@ -71,7 +71,7 @@ impl EndpointIn {
}
}

pub fn configure(&self, _cs: &CriticalSection) {
pub fn configure(&self, _cs: CriticalSection<'_>) {
if self.index() == 0 {
let mpsiz = match self.descriptor.max_packet_size {
8 => 0b11,
Expand All @@ -97,7 +97,7 @@ impl EndpointIn {
}
}

pub fn deconfigure(&self, _cs: &CriticalSection) {
pub fn deconfigure(&self, _cs: CriticalSection<'_>) {
let regs = self.usb.endpoint_in(self.index() as usize);

// deactivating endpoint
Expand Down Expand Up @@ -163,7 +163,7 @@ impl EndpointOut {
}
}

pub fn configure(&self, _cs: &CriticalSection) {
pub fn configure(&self, _cs: CriticalSection<'_>) {
if self.index() == 0 {
let mpsiz = match self.descriptor.max_packet_size {
8 => 0b11,
Expand All @@ -189,7 +189,7 @@ impl EndpointOut {
}
}

pub fn deconfigure(&self, _cs: &CriticalSection) {
pub fn deconfigure(&self, _cs: CriticalSection<'_>) {
let regs = self.usb.endpoint_out(self.index() as usize);

// deactivating endpoint
Expand All @@ -205,11 +205,11 @@ impl EndpointOut {
}

pub fn read(&self, buf: &mut [u8]) -> Result<usize> {
interrupt::free(|cs| self.buffer.borrow(cs).borrow_mut().read_packet(buf))
critical_section::with(|cs| self.buffer.borrow_ref_mut(cs).read_packet(buf))
}

pub fn buffer_state(&self) -> EndpointBufferState {
interrupt::free(|cs| self.buffer.borrow(cs).borrow().state())
critical_section::with(|cs| self.buffer.borrow_ref(cs).state())
}
}

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5 changes: 0 additions & 5 deletions src/target.rs
Original file line number Diff line number Diff line change
Expand Up @@ -2,11 +2,6 @@

use vcell::VolatileCell;

#[cfg(feature = "cortex-m")]
pub use cortex_m::interrupt;
#[cfg(feature = "riscv")]
pub use riscv::interrupt;

use crate::ral::register::RWRegister;
use crate::ral::{
endpoint0_out, endpoint_in, endpoint_out, otg_device, otg_global, otg_global_dieptxfx,
Expand Down

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