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Merge #315
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315: Use volatile read for ICSR register r=adamgreig a=lulf

This prevents the compiler from optimizing the read.

Edit: I also added a change to include the 9th bit in the IRQ. I can leave that out if it would break anything. 

#314

Co-authored-by: Ulf Lilleengen <ulf.lilleengen@gmail.com>
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bors[bot] and lulf authored Mar 2, 2021
2 parents cd08e49 + fcba6fe commit 1514f97
Showing 1 changed file with 1 addition and 1 deletion.
2 changes: 1 addition & 1 deletion macros/src/lib.rs
Original file line number Diff line number Diff line change
Expand Up @@ -227,7 +227,7 @@ pub fn exception(args: TokenStream, input: TokenStream) -> TokenStream {

const SCB_ICSR: *const u32 = 0xE000_ED04 as *const u32;

let irqn = unsafe { core::ptr::read(SCB_ICSR) as u8 as i16 - 16 };
let irqn = unsafe { (core::ptr::read_volatile(SCB_ICSR) & 0x1FF) as i16 - 16 };

#ident(irqn)
}
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