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action items from core_v_verif_multi review session #459

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strichmo
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move corev-dv out of uvme to env inside a core
move mcy to tools
rename sim directory to mk
use core-specific testbenches in ci_check
move vendor_lib under each core

Signed-off-by: Steve Richmond Steve.Richmond@silabs.com

move mcy to tools
rename sim directory to mk
use core-specific testbenches in ci_check
move vendor_lib under each core

Signed-off-by: Steve Richmond <Steve.Richmond@silabs.com>
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strichmo commented Feb 10, 2021

@MikeOpenHWGroup @GTumbush All AIs from meeting this afternoon are included. Tested in Xcelium, Questa and Metrics.

Signed-off-by: Steve Richmond <Steve.Richmond@silabs.com>
@MikeOpenHWGroup MikeOpenHWGroup merged commit 1942505 into openhwgroup:core_v_verif_multi Feb 11, 2021
@strichmo strichmo deleted the strichmo/pr/core_vendor_lib branch March 22, 2021 21:44
JeanRochCoulon added a commit to JeanRochCoulon/core-v-verif that referenced this pull request Feb 10, 2022
This commit adds the possibility to configure cva6 to be a 32-bit processor,
saving significant area. Currently, the 32-bit version is preliminary, it does
not yet implement the entire privileged specification. Hence it does not allow
booting Linux yet.
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2 participants