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[XPU] Support DeepNVMe new code structure #6532

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merged 5 commits into from
Sep 27, 2024

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Liangliang-Ma
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In DeepNVMe GDS update, many functions are changed into a more abstract way. Also added some files. These change break zero-infinity on XPU. To bring this feature back, we have this PR:

  1. modify the aio opbuilder for new files.
  2. Add custom cpu_op_desc_t for xpu users. (XPU don't handle buffer aligned here)

@tjruwase tjruwase requested review from tjruwase and jomayeri and removed request for arashb and awan-10 September 13, 2024 10:04
@Liangliang-Ma
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@tjruwase Hi, the nv CI tests seems break for env issues. Could you please help to take a look? thanks!

@loadams
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loadams commented Sep 26, 2024

@tjruwase Hi, the nv CI tests seems break for env issues. Could you please help to take a look? thanks!

@Liangliang-Ma - I've got this fixed now, I'll get this merged.

@loadams loadams enabled auto-merge September 26, 2024 19:04
@loadams loadams added this pull request to the merge queue Sep 26, 2024
Merged via the queue into microsoft:master with commit d45cfd3 Sep 27, 2024
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xuedinge233 added a commit to cosdt/DeepSpeed that referenced this pull request Sep 27, 2024
[XPU] Support DeepNVMe new code structure (microsoft#6532)
github-merge-queue bot pushed a commit that referenced this pull request Oct 22, 2024
We have found that #6592 uses `_pinned_tensor_mgr` to create cpu bounce
buffer, which is same with what our xpu accelerator currently doing.
So no need to use xpu device specific cpu_op_desc_t.
In this PR:
1. remove custom csrc/xpu/aio/deepspeed_cpu_op.cpp
2. modify xpu async_io opbuilder.

This issue cannot be easily done with revert #6532 , for we added some
source file as last time GDS feature going in DS. So file this new PR :)
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3 participants