Deprecate HPR support

compiler/codegen/CodeGenRA.cpp

@@ -1260,8 +1260,6 @@ OMR::CodeGenerator::pickRegister(TR_RegisterCandidate     *rc,
       const bool canExitEarly = !rc->canBeReprioritized();
       TR_BitVector alreadyAssignedOnEntry(self()->comp()->getSymRefCount(), self()->trMemory(), stackAlloc, growable);
       TR_BitVector alreadyAssignedOnExit(self()->comp()->getSymRefCount(), self()->trMemory(), stackAlloc, growable);
-      bool hprSimulated = false;
-      bool hprColdBlockSkipped = false;
 
       TR_BitVector blocksToVisit = rc->getBlocksLiveOnEntry();
       blocksToVisit |= rc->getBlocksLiveOnExit();
@@ -1295,11 +1293,6 @@ OMR::CodeGenerator::pickRegister(TR_RegisterCandidate     *rc,
 
          TR::Block *block = allBlocks[blockIterator.getNextElement()];
 
-         // do not assign HPR to candidate if we skipped any block simulation for correctness
-         if (!block->isExtensionOfPreviousBlock() && blockIsIgnorablyCold(block, self()))
-            {
-            hprColdBlockSkipped = true;
-            }
          if (!block->isExtensionOfPreviousBlock() && !blockIsIgnorablyCold(block, self()))
             {
             // This block starts an extended BB.
@@ -1381,24 +1374,7 @@ OMR::CodeGenerator::pickRegister(TR_RegisterCandidate     *rc,
                   // Perform the simulation for current block and accumulate into highWaterMark
                   //
                   TR_RegisterPressureSummary summary(state._gprPressure, state._fprPressure, state._vrfPressure);
-                  if (self()->supportsHighWordFacility())
-                     {
-                     TR::DataType dtype = rc->getSymbolReference()->getSymbol()->getDataType();
-                     if (dtype == TR::Int8 ||
-                         dtype == TR::Int16 ||
-                         dtype == TR::Int32)
-                        {
-                        // unless proven, candidate is HPR eligible
-                        state.setCandidateIsHPREligible(true);
-                        }
-                     else
-                        {
-                        state.setCandidateIsHPREligible(false);
-                        summary.spill(TR_hprSpill, self());
-                        }
-                     }
                   self()->simulateBlockEvaluation(block, &state, &summary);
-                  hprSimulated = true;
                   highWaterMark.accumulate(summary);
 
 #if defined(CACHE_CANDIDATE_SPECIFIC_RESULTS)
@@ -1691,51 +1667,6 @@ OMR::CodeGenerator::pickRegister(TR_RegisterCandidate     *rc,
             }
          }
 
-      if (self()->supportsHighWordFacility())
-         {
-         TR_BitVector HPRMasks = *self()->getGlobalRegisters(TR_hprSpill, self()->comp()->getMethodSymbol()->getLinkageConvention());
-         // We cannot assign an HPR if the corresponding GPR is alive.
-         // There is no safe way to anticipate whether instruction selection will clobber the High word
-         // e.g. generating 64-bit instructions for long arithmetics on 32-bit platform
-         // todo: maybe try checking candidate data type while assigning GPR? only clobber HPR candidate
-         // if the GPR candidate is long
-
-         if (remainingRegisters.intersects(HPRMasks))
-            {
-            for (int i = self()->getFirstGlobalGPR(); i < self()->getFirstGlobalHPR(); ++i)
-               {
-               if (!remainingRegisters.isSet(i))
-                  {
-                  TR_GlobalRegisterNumber highWordReg = self()->getGlobalHPRFromGPR(i);
-                  if (self()->traceSimulateTreeEvaluation())
-                     {
-                     traceMsg(self()->comp(), "            %s is not available, rejecting %s\n",
-                             self()->getDebug()->getGlobalRegisterName(i), self()->getDebug()->getGlobalRegisterName(highWordReg));
-                     }
-                  remainingRegisters.reset(highWordReg);
-                  }
-               }
-            }
-         // hack: always give priorities to HPR over GPR
-         // if any HPR candidate is present
-         if (remainingRegisters.intersects(HPRMasks))
-            {
-            TR::DataType dtype = rc->getSymbolReference()->getSymbol()->getDataType();
-            if (hprSimulated && !hprColdBlockSkipped)
-               {
-               if (self()->traceSimulateTreeEvaluation())
-                  {
-                  traceMsg(self()->comp(), "            HPR candidates are available, rejecting all GPR\n");
-                  remainingRegisters &= HPRMasks;
-                  }
-               }
-            else
-               {
-               // if simulation did not happen, do not use hpr (cold blocks etc)
-               remainingRegisters -= HPRMasks;
-               }
-            }
-         }
       if (self()->traceSimulateTreeEvaluation())
          {
          traceMsg(self()->comp(), "            final registers: ");
@@ -2628,37 +2559,6 @@ OMR::CodeGenerator::simulateTreeEvaluation(TR::Node *node, TR_RegisterPressureSt
       return;
       }
 
-   if (self()->supportsHighWordFacility())
-      {
-      // 390 Highword, maybe move this below to else .hasRegister?
-      if (self()->isCandidateLoad(node, state))
-         {
-         if (node->getOpCodeValue() == TR::iload)
-            {
-            //potential HPR candidate
-            //state->setCandidateIsHPREligible(true);
-            node->setIsHPREligible();
-            }
-         else
-            {
-            // not HPR candidate
-            state->setCandidateIsHPREligible(false);
-            summary->spill(TR_hprSpill, self());
-            }
-         }
-      // if candidate is an object ref
-      if (state->_candidate && node->getOpCode().hasSymbolReference())
-         {
-         if (node->getOpCode().isRef() &&
-             node->getSymbolReference() == state->_candidate->getSymbolReference())
-            {
-            // not HPR candidate
-            state->setCandidateIsHPREligible(false);
-            summary->spill(TR_hprSpill, self());
-            }
-         }
-      }
-
    TR_SimulatedNodeState &nodeState = self()->simulatedNodeState(node);
    if (nodeState.hasRegister())
       {
@@ -2753,63 +2653,12 @@ OMR::CodeGenerator::simulateTreeEvaluation(TR::Node *node, TR_RegisterPressureSt
                traceMsg(self()->comp(), " ++%s", self()->getDebug()->getName(child));
             }
 
-         if (self()->supportsHighWordFacility())
-            {
-            // first time visiting this node, clear the flag
-            if (node->getVisitCount() == state->_visitCountForInit && !self()->isCandidateLoad(node, state))
-               {
-               node->resetIsHPREligible();
-               }
-            }
          self()->simulateNodeEvaluation(node, state, summary);
 
-         if (self()->supportsHighWordFacility())
-            {
-            bool needToCheckHPR = false;
-            for (uint16_t i = 0; i < node->getNumChildren(); i++)
-               {
-               TR::Node *child = node->getChild(i);
-               if (child->getIsHPREligible())
-                  {
-                  //traceMsg(comp(), " child %d has isHPREligible set", i);
-                  needToCheckHPR = true;
-                  }
-               }
-
-            // if enableHighwordRA 390
-            if (needToCheckHPR && state->getCandidateIsHPREligible())
-               {
-               if (node->isEligibleForHighWordOpcode())
-                  {
-                  //traceMsg(comp(), " hpr");
-                  }
-               else
-                  {
-                  //traceMsg(comp(), " !hpr");
-                  node->resetIsHPREligible();
-                  state->setCandidateIsHPREligible(false);
-                  summary->spill(TR_hprSpill, self());
-                  }
-               }
-
-            if (node->getIsHPREligible())
-               {
-               //traceMsg(comp(), " assignedToHPR");
-               }
-            }
          node->setFutureUseCount(originalRefcount); // Parent will decrement
-
          }
       else
          {
-         if (self()->supportsHighWordFacility())
-            {
-            // first time visiting this node, clear the flag
-            if (node->getVisitCount() == state->_visitCountForInit && !self()->isCandidateLoad(node, state))
-               {
-               node->resetIsHPREligible();
-               }
-            }
          // Some kinds of nodes very commonly use temporaries, and sometimes
          // the number of temporaries depends on the registers used by
          // children, so compute this while the children are still live.
@@ -2830,41 +2679,6 @@ OMR::CodeGenerator::simulateTreeEvaluation(TR::Node *node, TR_RegisterPressureSt
             }
 
          self()->simulateNodeEvaluation(node, state, summary);
-
-         if (self()->supportsHighWordFacility())
-            {
-            bool needToCheckHPR = false;
-            for (uint16_t i = 0; i < node->getNumChildren(); i++)
-               {
-               TR::Node *child = node->getChild(i);
-               if (child->getIsHPREligible())
-                  {
-                  //traceMsg(comp(), " child %d has isHPREligible set", i);
-                  needToCheckHPR = true;
-                  }
-               }
-
-            if (needToCheckHPR && state->getCandidateIsHPREligible())
-               {
-               // if enableHighwordRA 390
-               if (node->isEligibleForHighWordOpcode())
-                  {
-                  //traceMsg(comp(), " hpr");
-                  }
-               else
-                  {
-                  node->resetIsHPREligible();
-                  state->setCandidateIsHPREligible(false);
-                  summary->spill(TR_hprSpill, self());
-                  //traceMsg(comp(), " !hpr");
-                  }
-               }
-
-            if (node->getIsHPREligible())
-               {
-               //traceMsg(comp(), " assignedToHPR");
-               }
-            }
          }
 
       // Accumulate the current state into the summary

compiler/codegen/OMRCodeGenerator.cpp

@@ -1098,7 +1098,7 @@ OMR::CodeGenerator::isGlobalVRF(TR_GlobalRegisterNumber n)
 bool
 OMR::CodeGenerator::isGlobalFPR(TR_GlobalRegisterNumber n)
    {
-   return !self()->isGlobalGPR(n) && !self()->isGlobalHPR(n);
+   return !self()->isGlobalGPR(n);
    }
 
 TR_BitVector *
@@ -1123,7 +1123,6 @@ bool OMR::CodeGenerator::supportsInternalPointers()
    return self()->internalPointerSupportImplemented();
    }
 
-
 uint16_t
 OMR::CodeGenerator::getNumberOfGlobalRegisters()
    {
@@ -1133,25 +1132,12 @@ OMR::CodeGenerator::getNumberOfGlobalRegisters()
       return _lastGlobalFPR + 1;
    }
 
-
-#ifdef TR_HOST_S390
-uint16_t OMR::CodeGenerator::getNumberOfGlobalGPRs()
-   {
-   if (self()->supportsHighWordFacility())
-      {
-      return _firstGlobalHPR;
-      }
-   return _lastGlobalGPR + 1;
-   }
-#endif
-
 int32_t OMR::CodeGenerator::getMaximumNumberOfGPRsAllowedAcrossEdge(TR::Block *block)
    {
    TR::Node *node = block->getLastRealTreeTop()->getNode();
    return self()->getMaximumNumberOfGPRsAllowedAcrossEdge(node);
    }
 
-
 TR::Register *OMR::CodeGenerator::allocateCollectedReferenceRegister()
    {
    TR::Register * temp = self()->allocateRegister();

compiler/codegen/OMRCodeGenerator.hpp

@@ -116,7 +116,6 @@ enum TR_SpillKinds // For register pressure simulation
    {
    // Mandatory spill kinds are certain to cause a spill to memory
    //
-   TR_hprSpill,       // zGryphon 390 All integer highword regs
    TR_gprSpill,       // All integer regs
    TR_fprSpill,       // All floating-point regs
    TR_vrfSpill,       // All vector regs
@@ -918,14 +917,6 @@ class OMR_EXTENSIBLE CodeGenerator
    TR_GlobalRegisterNumber getLastGlobalGPR()  {return _lastGlobalGPR;}
    TR_GlobalRegisterNumber setLastGlobalGPR(TR_GlobalRegisterNumber n) {return (_lastGlobalGPR = n);}
 
-   TR_GlobalRegisterNumber getFirstGlobalHPR() {return _firstGlobalHPR;}
-   TR_GlobalRegisterNumber setFirstGlobalHPR(TR_GlobalRegisterNumber n) {return (_firstGlobalHPR = n);}
-   TR_GlobalRegisterNumber getLastGlobalHPR() {return _lastGlobalHPR;}
-   TR_GlobalRegisterNumber setLastGlobalHPR(TR_GlobalRegisterNumber n) {return (_lastGlobalHPR = n);}
-
-   TR_GlobalRegisterNumber getGlobalHPRFromGPR (TR_GlobalRegisterNumber n) {return 0;}
-   TR_GlobalRegisterNumber getGlobalGPRFromHPR (TR_GlobalRegisterNumber n) {return 0;}
-
    TR_GlobalRegisterNumber getFirstGlobalFPR() {return _lastGlobalGPR + 1;}
    TR_GlobalRegisterNumber setFirstGlobalFPR(TR_GlobalRegisterNumber n) {return (_firstGlobalFPR = n);}
    TR_GlobalRegisterNumber getLastGlobalFPR() {return _lastGlobalFPR;}
@@ -952,11 +943,7 @@ class OMR_EXTENSIBLE CodeGenerator
 
    uint16_t getNumberOfGlobalRegisters();
 
-#ifdef TR_HOST_S390
-   uint16_t getNumberOfGlobalGPRs();
-#else
    uint16_t getNumberOfGlobalGPRs() {return _lastGlobalGPR + 1;}
-#endif
    uint16_t getNumberOfGlobalFPRs() {return _lastGlobalFPR - _lastGlobalGPR;}
    uint16_t getNumberOfGlobalVRFs() {return _lastGlobalVRF - _firstGlobalVRF;}
 
@@ -967,7 +954,6 @@ class OMR_EXTENSIBLE CodeGenerator
    uint8_t setGlobalFPRPartitionLimit(uint8_t l) {return (_globalFPRPartitionLimit = l);}
 
    bool isGlobalGPR(TR_GlobalRegisterNumber n) {return n <= _lastGlobalGPR;}
-   bool isGlobalHPR(TR_GlobalRegisterNumber n) {return (n >= _firstGlobalHPR && n <= _lastGlobalHPR);}
 
    bool isAliasedGRN(TR_GlobalRegisterNumber n);
    TR_GlobalRegisterNumber getOverlappedAliasForGRN(TR_GlobalRegisterNumber n);
@@ -1941,8 +1927,6 @@ class OMR_EXTENSIBLE CodeGenerator
 
    TR_RegisterMask _liveRealRegisters[NumRegisterKinds];
    TR_GlobalRegisterNumber _lastGlobalGPR;
-   TR_GlobalRegisterNumber _firstGlobalHPR;
-   TR_GlobalRegisterNumber _lastGlobalHPR;
    TR_GlobalRegisterNumber _firstGlobalFPR;
    TR_GlobalRegisterNumber _lastGlobalFPR;
    TR_GlobalRegisterNumber _firstOverlappedGlobalFPR;

compiler/codegen/RegisterPressureSimulatorInner.hpp

@@ -68,7 +68,6 @@
 
       uint32_t                     _memrefNestDepth; // Recursion depth of simulateMemoryReference; used for diagnostics
       TR_SimulatedMemoryReference *_currentMemref;
-      bool          _candidateIsHPREligible;  // 390 zGryphon Highword GRA
 
       TR_RegisterPressureState(TR_RegisterCandidate *candidate, bool candidateIsLiveOnEntry, TR_BitVector &alreadyAssignedOnEntry, TR_BitVector &alreadyAssignedOnExit, TR_LinkHead<TR_RegisterCandidate> *candidatesAlreadyAssigned, uint32_t gprLimit, uint32_t fprLimit, uint32_t vrfLimit, vcount_t visitCountForInit):
          _currentBlock(NULL),
@@ -90,8 +89,7 @@
          _visitCountForInit(visitCountForInit),
          _memrefNestDepth(0),
          _rematNestDepth(0),
-         _currentMemref(0),
-         _candidateIsHPREligible(0)
+         _currentMemref(0)
          {}
       TR_RegisterPressureState(const TR_RegisterPressureState &other, TR_RegisterCandidate *candidate, bool candidateIsLiveOnEntry, vcount_t visitCountForInit):
          _currentBlock              (other._currentBlock),
@@ -113,8 +111,7 @@
          _numLiveCandidateLoads     (other._numLiveCandidateLoads),
          _memrefNestDepth           (other._memrefNestDepth),
          _rematNestDepth            (other._rematNestDepth),
-         _currentMemref             (other._currentMemref),
-         _candidateIsHPREligible    (0)
+         _currentMemref             (other._currentMemref)
          {}
 
        TR::SymbolReference *getCandidateSymRef();
@@ -144,8 +141,6 @@
 
       bool pressureIsAtRisk()       { return _pressureRiskFromStart || (_pressureRiskUntilEnd > 0); }
       bool candidateIsLiveAfterGRA(){ return pressureIsAtRisk() || (_numLiveCandidateLoads > 0); }
-      bool getCandidateIsHPREligible() { return _candidateIsHPREligible;}
-      void setCandidateIsHPREligible(bool b) { _candidateIsHPREligible = b;}
 
       void updateRegisterPressure(TR::Symbol *symbol);
 

compiler/control/OMROptions.cpp

@@ -697,8 +697,6 @@ TR::OptionTable OMR::Options::_jitOptions[] = {
    {"enableLastRetrialLogging",          "O\tenable fullTrace logging for last compilation attempt. Needs to have a log defined on the command line", SET_OPTION_BIT(TR_EnableLastCompilationRetrialLogging), "F"},
    {"enableLinkagePreserveStrategy2",              "O\tenable linkage strategy 2", SET_OPTION_BIT(TR_LinkagePreserveStrategy2), "F"},
    {"enableLocalVPSkipLowFreqBlock",     "O\tSkip processing of low frequency blocks in localVP", SET_OPTION_BIT(TR_EnableLocalVPSkipLowFreqBlock), "F" },
-   {"enableLongRegAllocation",            "O\tenable allocation of 64-bit regs on 32-bit",      SET_OPTION_BIT(TR_Enable64BitRegsOn32Bit), "F"},
-   {"enableLongRegAllocationHeuristic",   "O\tenable heuristic for long register allocation",   SET_OPTION_BIT(TR_Enable64BitRegsOn32BitHeuristic), "F"},
    {"enableLoopEntryAlignment",            "O\tenable loop Entry alignment",                          SET_OPTION_BIT(TR_EnableLoopEntryAlignment), "F"},
    {"enableLoopVersionerCountAllocFences", "O\tallow loop versioner to count allocation fence nodes on PPC toward a profiled guard's block total", SET_OPTION_BIT(TR_EnableLoopVersionerCountAllocationFences), "F"},
    {"enableLowerCompilationLimitsDecisionMaking", "O\tenable the piece of code that lowers compilation limits when low on virtual memory (on Linux and z/OS)",