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dts: USB for MSM8960 #5
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…git/masahiroy/linux-kbuild.git
…/git/acme/linux.git
…t/arnd/asm-generic.git
…rnel/git/arm64/linux
…git/soc/soc.git # Conflicts: # arch/arm/mach-bcm/bcm63xx.c # arch/arm/mach-davinci/board-dm644x-evm.c # arch/arm/mach-davinci/board-dm646x-evm.c # arch/arm/mach-davinci/board-neuros-osd2.c # arch/arm/mach-davinci/dm644x.c # arch/arm/mach-davinci/dm646x.c
…git/mani/linux-actions.git
…git/amlogic/linux.git
…/git/at91/linux.git
…git/shawnguo/linux.git
…ssantosh/linux-keystone.git
…git/matthias.bgg/linux.git
…git/gclement/mvebu.git
…git/tmlind/linux-omap.git
…git/qcom/linux.git
…git/nsaenz/linux-rpi.git
…geert/renesas-devel.git
…git/mmind/linux-rockchip.git
…git/krzk/linux.git
…ernel/git/sudeep.holla/linux.git
…l/git/atorgue/stm32.git
…ernel/git/sunxi/linux.git
Convert Qualcomm SPMI PMIC binding to yaml format.
Additional changes:
- filled many missing compatibles
Co-developed-by: Caleb Connolly <caleb@connolly.tech>
Signed-off-by: David Heidelberg <david@ixit.cz>
---
v3:
- added subnodes, there are two not converted to YAML yet, but it works
- now it prints milion directly unrelated warning to this binding
(it's related to the included subnodes bindings, can be merged,
but it'll generate more warnings and preferably anyone can takeover
from here)
- add qcom,pmx65
v2:
- changed author to myself, kept Caleb as co-author
- moved nodename to properties
- add nodenames for pm* with deprecated property
- add ^$ to pattern properties
- dropped interrupt-names property
- added reg prop. to the nodes which have register in nodename
- added compatible pmx55
Convert Qualcomm SCM firmware binding to the yaml format. This commit also: - adds qcom,scm-mdm9607 into list which has only core clock - adds qcom,scm-sm6125, qcom,scm-ipq6018 - #reset-cells, because the property is already used Signed-off-by: David Heidelberg <david@ixit.cz> -- v5: - add qcom,scm-sdx65 from new commit to txt binding - add freshly merged qcom,scm-sc8280xp - add interconnects - add accidentally removed # from #include directive - move mdm9607 to 3 clocks (thx @guru) - fix compatible string in example v4: - added clocks minItems and maxItems - removed quotes from $id and $schema - adjusted description of TCSR HW block v3: - add preceding patches for ARM and arm64 adding missing compatible strings - extended with missing compatible strings - added two additional maintainers, see https://lkml.org/lkml/2022/6/23/1969 v2: - changed maintainer to Bjorn - document #reset-cells Signed-off-by: David Heidelberg <david@ixit.cz>
Change the reference of sleep_clk to the same as qcom-apq8064.dtsi. Signed-off-by: Shinjo Park <peremen@gmail.com>
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both |
Use the same USB definition as qcom-apq8064.dtsi, tested on Casio GzOne. Signed-off-by: Shinjo Park <peremen@gmail.com>
Document the changes introduced by MSM8960 inclusion. Signed-off-by: Shinjo Park <peremen@gmail.com>
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@okias What is the current status of this mainline? Is everything working or are there things missing? I cannot really find any status anywhere, |
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…uctions
Add several ./test_progs tests:
- arena_atomics/load_acquire
- arena_atomics/store_release
- verifier_load_acquire/*
- verifier_store_release/*
- verifier_precision/bpf_load_acquire
- verifier_precision/bpf_store_release
The last two tests are added to check if backtrack_insn() handles the
new instructions correctly.
Additionally, the last test also makes sure that the verifier
"remembers" the value (in src_reg) we store-release into e.g. a stack
slot. For example, if we take a look at the test program:
#0: r1 = 8;
/* store_release((u64 *)(r10 - 8), r1); */
#1: .8byte %[store_release];
#2: r1 = *(u64 *)(r10 - 8);
#3: r2 = r10;
#4: r2 += r1;
#5: r0 = 0;
torvalds#6: exit;
At #1, if the verifier doesn't remember that we wrote 8 to the stack,
then later at #4 we would be adding an unbounded scalar value to the
stack pointer, which would cause the program to be rejected:
VERIFIER LOG:
=============
...
math between fp pointer and register with unbounded min value is not allowed
For easier CI integration, instead of using built-ins like
__atomic_{load,store}_n() which depend on the new
__BPF_FEATURE_LOAD_ACQ_STORE_REL pre-defined macro, manually craft
load-acquire/store-release instructions using __imm_insn(), as suggested
by Eduard.
All new tests depend on:
(1) Clang major version >= 18, and
(2) ENABLE_ATOMICS_TESTS is defined (currently implies -mcpu=v3 or
v4), and
(3) JIT supports load-acquire/store-release (currently arm64 and
x86-64)
In .../progs/arena_atomics.c:
/* 8-byte-aligned */
__u8 __arena_global load_acquire8_value = 0x12;
/* 1-byte hole */
__u16 __arena_global load_acquire16_value = 0x1234;
That 1-byte hole in the .addr_space.1 ELF section caused clang-17 to
crash:
fatal error: error in backend: unable to write nop sequence of 1 bytes
To work around such llvm-17 CI job failures, conditionally define
__arena_global variables as 64-bit if __clang_major__ < 18, to make sure
.addr_space.1 has no holes. Ideally we should avoid compiling this file
using clang-17 at all (arena tests depend on
__BPF_FEATURE_ADDR_SPACE_CAST, and are skipped for llvm-17 anyway), but
that is a separate topic.
Acked-by: Eduard Zingerman <eddyz87@gmail.com>
Signed-off-by: Peilin Ye <yepeilin@google.com>
Link: https://lore.kernel.org/r/1b46c6feaf0f1b6984d9ec80e500cc7383e9da1a.1741049567.git.yepeilin@google.com
Signed-off-by: Alexei Starovoitov <ast@kernel.org>
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Copied APQ8064's USB definition from dtsi file, it is working on the real device.