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treewide: spi: Enforce proper CS pin usage #103

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Nov 18, 2020
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40 changes: 32 additions & 8 deletions avr-hal-generic/src/spi.rs
Original file line number Diff line number Diff line change
Expand Up @@ -75,9 +75,29 @@ macro_rules! impl_spi {
sclk: $sclkmod:ident::$SCLK:ident,
mosi: $mosimod:ident::$MOSI:ident,
miso: $misomod:ident::$MISO:ident,
cs: $csmod:ident::$CS:ident,
}
}
) => {

/// Wrapper for the CS pin
///
/// Used to contain the chip-select pin during operation to prevent its mode from being
/// changed from Output. Implements
/// [`OutputPin`](https://docs.rs/embedded-hal/latest/embedded_hal/digital/v2/trait.OutputPin.html)
/// so that it can still be controlled.
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pub struct ChipSelectPin($csmod::$CS<$crate::port::mode::Output>);

impl $crate::hal::digital::v2::OutputPin for ChipSelectPin {
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type Error = <$csmod::$CS<$crate::port::mode::Output> as $crate::hal::digital::v2::OutputPin>::Error;
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fn set_low(&mut self) -> Result<(), Self::Error> {
self.0.set_low()
}
fn set_high(&mut self) -> Result<(), Self::Error> {
self.0.set_high()
}
}

/// Behavior for a SPI interface.
///
/// Stores the SPI peripheral for register access. In addition, it takes
Expand All @@ -94,19 +114,21 @@ macro_rules! impl_spi {
}

impl $Spi<$crate::port::mode::PullUp> {
/// Instantiate an SPI with the registers, SCLK/MOSI/MISO pins, and settings,
/// Instantiate an SPI with the registers, SCLK/MOSI/MISO/CS pins, and settings,
/// with the internal pull-up enabled on the MISO pin.
///
/// The pins are not actually used directly, but they are moved into the struct in
/// order to enforce that they are in the correct mode, and cannot be used by anyone
/// else while SPI is active.
/// else while SPI is active. CS is placed into a `ChipSelectPin` instance and given
/// back so that its output state can be changed as needed.
pub fn new(
peripheral: $SPI,
sclk: $sclkmod::$SCLK<$crate::port::mode::Output>,
mosi: $mosimod::$MOSI<$crate::port::mode::Output>,
miso: $misomod::$MISO<$crate::port::mode::Input<$crate::port::mode::PullUp>>,
cs: $csmod::$CS<$crate::port::mode::Output>,
settings: Settings
) -> Self {
) -> (Self, ChipSelectPin) {
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let spi = $Spi {
peripheral,
sclk,
Expand All @@ -116,17 +138,18 @@ macro_rules! impl_spi {
is_write_in_progress: false,
};
spi.setup();
spi
(spi, ChipSelectPin(cs))
}
}

impl $Spi<$crate::port::mode::Floating> {
/// Instantiate an SPI with the registers, SCLK/MOSI/MISO pins, and settings,
/// Instantiate an SPI with the registers, SCLK/MOSI/MISO/CS pins, and settings,
/// with an external pull-up on the MISO pin.
///
/// The pins are not actually used directly, but they are moved into the struct in
/// order to enforce that they are in the correct mode, and cannot be used by anyone
/// else while SPI is active.
/// else while SPI is active. CS is placed into a `ChipSelectPin` instance and given
/// back so that its output state can be changed as needed.
pub fn with_external_pullup(
peripheral: $SPI,
sclk: $sclkmod::$SCLK<$crate::port::mode::Output>,
Expand All @@ -151,16 +174,17 @@ macro_rules! impl_spi {
/// Disable the SPI device and release ownership of the peripheral
/// and pins. Instance can no-longer be used after this is
/// invoked.
pub fn release(self) -> (
pub fn release(self, cs: ChipSelectPin) -> (
$SPI,
$sclkmod::$SCLK<$crate::port::mode::Output>,
$mosimod::$MOSI<$crate::port::mode::Output>,
$misomod::$MISO<$crate::port::mode::Input<MisoInputMode>>,
$csmod::$CS<$crate::port::mode::Output>,
) {
self.peripheral.spcr.write(|w| {
w.spe().clear_bit()
});
(self.peripheral, self.sclk, self.mosi, self.miso)
(self.peripheral, self.sclk, self.mosi, self.miso, cs.0)
}

/// Write a byte to the data register, which begins transmission
Expand Down
1 change: 1 addition & 0 deletions chips/atmega328p-hal/src/lib.rs
Original file line number Diff line number Diff line change
Expand Up @@ -169,6 +169,7 @@ pub mod spi {
sclk: portb::PB5,
mosi: portb::PB3,
miso: portb::PB4,
cs: portb::PB2,
}
}
}
Expand Down