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[WIP]: PX4IO F7 DMA buffer review (dcache flush and alignment) #12075

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[WIP]: PX4IO F7 DMA buffer review (dcache flush and alignment) #12075

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@dagar dagar commented May 25, 2019

  • explicitly align the buffer to ARMV7M_DCACHE_LINESIZE
  • simpler alignment rounding logic (from stm32_ethernet.c)

With the current code in master _io_buffer_storage ends up as 128 bytes, however the dcache flush size (ALIGNED_IO_BUFFER_SIZE) is only 96 bytes.

@dagar dagar added bug NuttX (OS) Board: Pixhawk fmu-v5 FMU-v5 including pixhawk 4, pixhack v5, etc labels May 25, 2019
@dagar dagar requested a review from davids5 May 25, 2019 20:22
@weekly-digest weekly-digest bot mentioned this pull request May 26, 2019
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@dagar dagar changed the title WIP: PX4IO F7 DMA buffer review (dcache flush and alignment) [WIP]: PX4IO F7 DMA buffer review (dcache flush and alignment) May 26, 2019
@weekly-digest weekly-digest bot mentioned this pull request Jun 2, 2019
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@dagar dagar mentioned this pull request Jun 8, 2019
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dagar commented Jul 8, 2019

Rolled into #12435.

@dagar dagar closed this Jul 8, 2019
@dagar dagar deleted the pr-px4io_f7_dcache branch July 11, 2019 02:35
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