This commit ports the stm32f20xxf40xx_flash.c driver to the STM32F7 p…

…latform and fixes some relevant problems in the header files.
PX4 · Aug 3, 2018 · caa7fa7 · caa7fa7
1 parent bfc8f9d
commit caa7fa7
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Showing 7 changed files with 432 additions and 8 deletions.
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
@@ -297,6 +297,7 @@ config ARCH_CHIP_STM32F7
 	select ARCH_HAVE_FETCHADD
 	select ARCH_HAVE_I2CRESET
 	select ARCH_HAVE_HEAPCHECK
+	select ARCH_HAVE_PROGMEM
 	select ARCH_HAVE_SPI_BITORDER
 	select ARM_HAVE_MPU_UNIFIED
 	select ARMV7M_HAVE_STACKCHECK

diff --git a/arch/arm/src/stm32f7/Make.defs b/arch/arm/src/stm32f7/Make.defs
@@ -108,7 +108,7 @@ endif
 CHIP_ASRCS  =
 CHIP_CSRCS  = stm32_allocateheap.c stm32_exti_gpio.c stm32_gpio.c
 CHIP_CSRCS += stm32_irq.c stm32_lowputc.c stm32_rcc.c stm32_serial.c
-CHIP_CSRCS += stm32_start.c stm32_capture.c
+CHIP_CSRCS += stm32_start.c stm32_capture.c stm32_flash.c
 
 ifneq ($(CONFIG_SCHED_TICKLESS),y)
 CHIP_CSRCS += stm32_timerisr.c

diff --git a/arch/arm/src/stm32f7/chip/stm32f72xx73xx_flash.h b/arch/arm/src/stm32f7/chip/stm32f72xx73xx_flash.h
@@ -162,7 +162,7 @@
 #define FLASH_CR_MER               (1 << 2)  /* Bit 2:  Mass Erase sectors 0..11 */
 #define FLASH_CR_SNB_SHIFT         (3)       /* Bits 3-6: Sector number */
 #define FLASH_CR_SNB_MASK          (0xf << FLASH_CR_SNB_SHIFT)  /* Used to clear FLASH_CR_SNB bits */
-#  define FLASH_CR_SNB(n)          ((uint32_t)(n & 0x7) << FLASH_CR_SNB_SHIFT)) /* Sector n, n=0..7 */
+#  define FLASH_CR_SNB(n)          ((uint32_t)(n & 0x7) << FLASH_CR_SNB_SHIFT) /* Sector n, n=0..7 */
 #define FLASH_CR_PSIZE_SHIFT       (8)       /* Bits 8-9: Program size */
 #define FLASH_CR_PSIZE_MASK        (3 << FLASH_CR_PSIZE_SHIFT)
 #  define FLASH_CR_PSIZE_X8        (0 << FLASH_CR_PSIZE_SHIFT) /* Program x8 */

diff --git a/arch/arm/src/stm32f7/chip/stm32f74xx75xx_flash.h b/arch/arm/src/stm32f7/chip/stm32f74xx75xx_flash.h
@@ -151,7 +151,7 @@
 #define FLASH_CR_MER               (1 << 2)  /* Bit 2:  Mass Erase sectors 0..11 */
 #define FLASH_CR_SNB_SHIFT         (3)       /* Bits 3-6: Sector number */
 #define FLASH_CR_SNB_MASK          (0xf << FLASH_CR_SNB_SHIFT)
-#  define FLASH_CR_SNB(n)          ((uint32_t)((n) % 8) << FLASH_CR_SNB_SHIFT) | ((n / 8) << 6)) /* Sector n, n=0..23 */
+#  define FLASH_CR_SNB(n)          (((uint32_t)((n) % 8) << FLASH_CR_SNB_SHIFT) | ((n / 8) << 6)) /* Sector n, n=0..23 */
 #define FLASH_CR_PSIZE_SHIFT       (8)       /* Bits 8-9: Program size */
 #define FLASH_CR_PSIZE_MASK        (3 << FLASH_CR_PSIZE_SHIFT)
 #  define FLASH_CR_PSIZE_X8        (0 << FLASH_CR_PSIZE_SHIFT) /* Program x8 */

diff --git a/arch/arm/src/stm32f7/chip/stm32f76xx77xx_flash.h b/arch/arm/src/stm32f7/chip/stm32f76xx77xx_flash.h
@@ -1,7 +1,7 @@
 /************************************************************************************
  * arch/arm/src/stm32f7/chip/stm32f74xx75xx_flash.h
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015, 2018 Gregory Nutt. All rights reserved.
  *   Authors: Gregory Nutt <gnutt@nuttx.org>
  *            David Sidrane <david_s5@nscdg.com>
  *
@@ -106,8 +106,8 @@
 #  define STM32_FLASH_NPAGES      12
 #  define STM32_FLASH_SIZE        _K((4 * 32) + (1 * 128) + (7 * 256))
 #  define STM32_FLASH_SIZES       {_K(32), _K(32), _K(32), _K(32),  \
-                                  _K(128), _K(256), _K(256), _K(256) \
-                                  _K(256), _K(256), _K(256), _K(256)}
+                                   _K(128), _K(256), _K(256), _K(256), \
+                                   _K(256), _K(256), _K(256), _K(256)}
 #endif
 
 /* Register Offsets *****************************************************************/
@@ -165,7 +165,7 @@
 #define FLASH_CR_MER_MER1          (1 << 2)  /* Bit 2:  Mass Erase sectors 0..11 */
 #define FLASH_CR_SNB_SHIFT         (3)       /* Bits 3-6: Sector number */
 #define FLASH_CR_SNB_MASK          (0x1f << FLASH_CR_SNB_SHIFT)
-#  define FLASH_CR_SNB(n)          ((uint32_t)((n) % 12) << FLASH_CR_SNB_SHIFT) | ((n / 12) << 7)) /* Sector n, n=0..23 */
+#  define FLASH_CR_SNB(n)          (((uint32_t)((n) % 12) << FLASH_CR_SNB_SHIFT) | ((n / 12) << 7)) /* Sector n, n=0..23 */
 #define FLASH_CR_PSIZE_SHIFT       (8)       /* Bits 8-9: Program size */
 #define FLASH_CR_PSIZE_MASK        (3 << FLASH_CR_PSIZE_SHIFT)
 #  define FLASH_CR_PSIZE_X8        (0 << FLASH_CR_PSIZE_SHIFT) /* Program x8 */