px4fmu-v5:Added Muti Brick support definitions

   BOARD_HAS_LTC44XX_VALIDS - 0 -> No LTC44xx IC, N is the number of
                              Power Bricks connected to the LTC44xx
                              For a LTC4417 this would be 2 as the
                              third prioriy is used for USB

   BOARD_HAS_USB_VALID     - If defied as 1 imples that infact
                             the USB has a priority connection
                             on the LTC44XX

   BOARD_HAS_NBAT_V       - the number of battery voltage sensing chennels
                            on the ADC

   BOARD_HAS_NBAT_I      - the number of battery current  sensing chennels
                            on the ADC

   A super simple (non FMUv5 compliant) board with no LTC44xx and just one battery
   that have no current sense:

    BOARD_HAS_LTC44XX_VALIDS = 0
    BOARD_HAS_USB_VALID      = 0
    BOARD_HAS_NBAT_V         = 1
    BOARD_HAS_NBAT_0         = 0

   A fully FMUv5 compliant design would use:

    BOARD_HAS_LTC44XX_VALIDS = 2
    BOARD_HAS_USB_VALID      = 1
    BOARD_HAS_NBAT_V         = 2
    BOARD_HAS_NBAT_0         = 2

   These setting properly condition the ADC channles and all the Power
   module valid sensing logic in the ADC module.

src/drivers/boards/px4fmu-v5/board_config.h

@@ -54,6 +54,11 @@
  ****************************************************************************************************/
 /* Configuration ************************************************************************************/
 
+#define BOARD_HAS_LTC44XX_VALIDS      2 // No LTC or N Bricks
+#define BOARD_HAS_USB_VALID           1 // LTC Has No USB valid
+#define BOARD_HAS_NBAT_V              2 // Only one Vbat to ADC
+#define BOARD_HAS_NBAT_I              2 // No Ibat ADC
+
 /* PX4FMU GPIOs ***********************************************************************************/
 
 /* LEDs are driven with push open drain to support Anode to 5V or 3.3V */
@@ -245,6 +250,7 @@
 #define ADC_HW_REV_SENSE_CHANNEL            /* PC3 */  ADC1_CH(13)
 #define ADC1_SPARE_1_CHANNEL                /* PC4 */  ADC1_CH(14)
 
+#if BOARD_HAS_NBAT_V == 2 && BOARD_HAS_NBAT_I == 2
 #define ADC_CHANNELS \
 	((1 << ADC_BATTERY1_VOLTAGE_CHANNEL)       | \
 	 (1 << ADC_BATTERY1_CURRENT_CHANNEL)       | \
@@ -257,6 +263,28 @@
 	 (1 << ADC_HW_VER_SENSE_CHANNEL)           | \
 	 (1 << ADC_HW_REV_SENSE_CHANNEL)           | \
 	 (1 << ADC1_SPARE_1_CHANNEL))
+#elif BOARD_HAS_NBAT_V == 1 && BOARD_HAS_NBAT_I == 1
+#define ADC_CHANNELS \
+	((1 << ADC_BATTERY1_VOLTAGE_CHANNEL)       | \
+	 (1 << ADC_BATTERY1_CURRENT_CHANNEL)       | \
+	 (1 << ADC1_SPARE_2_CHANNEL)               | \
+	 (1 << ADC_RSSI_IN_CHANNEL)                | \
+	 (1 << ADC_SCALED_V5_CHANNEL)              | \
+	 (1 << ADC_SCALED_VDD_3V3_SENSORS_CHANNEL) | \
+	 (1 << ADC_HW_VER_SENSE_CHANNEL)           | \
+	 (1 << ADC_HW_REV_SENSE_CHANNEL)           | \
+	 (1 << ADC1_SPARE_1_CHANNEL))
+#elif BOARD_HAS_NBAT_V == 1 && BOARD_HAS_NBAT_I == 0
+#define ADC_CHANNELS \
+	((1 << ADC_BATTERY1_VOLTAGE_CHANNEL)       | \
+	 (1 << ADC1_SPARE_2_CHANNEL)               | \
+	 (1 << ADC_RSSI_IN_CHANNEL)                | \
+	 (1 << ADC_SCALED_V5_CHANNEL)              | \
+	 (1 << ADC_SCALED_VDD_3V3_SENSORS_CHANNEL) | \
+	 (1 << ADC_HW_VER_SENSE_CHANNEL)           | \
+	 (1 << ADC_HW_REV_SENSE_CHANNEL)           | \
+	 (1 << ADC1_SPARE_1_CHANNEL))
+#endif
 
 /* HW Version and Revision drive signals Default to 1 to detect */
 
@@ -493,10 +521,39 @@
  * provides the true logic GPIO BOARD_ADC_xxxx macros.
  */
 #define BOARD_ADC_USB_CONNECTED (px4_arch_gpioread(GPIO_OTGFS_VBUS))
-#define BOARD_ADC_BRICK1_VALID  (!px4_arch_gpioread(GPIO_nVDD_BRICK1_VALID))
-#define BOARD_ADC_BRICK2_VALID  (!px4_arch_gpioread(GPIO_nVDD_BRICK1_VALID))
-#define BOARD_ADC_USB_VALID     (!px4_arch_gpioread(GPIO_nVDD_USB_VALID))
-#define BOARD_ADC_SERVO_VALID   (1)
+
+#if BOARD_HAS_USB_VALID == 1
+#  define BOARD_ADC_USB_VALID     (!px4_arch_gpioread(GPIO_nVDD_USB_VALID))
+#else
+#  define BOARD_ADC_USB_VALID     BOARD_ADC_USB_CONNECTED
+#endif
+
+/* FMUv5 never powers odd the Servo rail */
+
+#define BOARD_ADC_SERVO_VALID     (1)
+
+#if !defined(BOARD_HAS_LTC44XX_VALIDS) || BOARD_HAS_LTC44XX_VALIDS == 0
+#  define BOARD_ADC_BRICK1_VALID  (1)
+#  define BOARD_ADC_BRICK2_VALID  (0)
+#elif BOARD_HAS_LTC44XX_VALIDS == 1
+#  define BOARD_ADC_BRICK1_VALID  (!px4_arch_gpioread(GPIO_nVDD_BRICK1_VALID))
+#  define BOARD_ADC_BRICK2_VALID  (0)
+#elif BOARD_HAS_LTC44XX_VALIDS == 2
+#  define BOARD_ADC_BRICK1_VALID  (!px4_arch_gpioread(GPIO_nVDD_BRICK1_VALID))
+#  define BOARD_ADC_BRICK2_VALID  (!px4_arch_gpioread(GPIO_nVDD_BRICK2_VALID))
+#elif BOARD_HAS_LTC44XX_VALIDS == 3
+#  define BOARD_ADC_BRICK1_VALID  (!px4_arch_gpioread(GPIO_nVDD_BRICK1_VALID))
+#  define BOARD_ADC_BRICK2_VALID  (!px4_arch_gpioread(GPIO_nVDD_BRICK2_VALID))
+#  define BOARD_ADC_BRICK3_VALID  (!px4_arch_gpioread(GPIO_nVDD_BRICK3_VALID))
+#elif BOARD_HAS_LTC44XX_VALIDS == 4
+#  define BOARD_ADC_BRICK1_VALID  (!px4_arch_gpioread(GPIO_nVDD_BRICK1_VALID))
+#  define BOARD_ADC_BRICK2_VALID  (!px4_arch_gpioread(GPIO_nVDD_BRICK2_VALID))
+#  define BOARD_ADC_BRICK3_VALID  (!px4_arch_gpioread(GPIO_nVDD_BRICK3_VALID))
+#  define BOARD_ADC_BRICK4_VALID  (!px4_arch_gpioread(GPIO_nVDD_BRICK4_VALID))
+#else
+#  error Unsupported BOARD_HAS_LTC44XX_VALIDS value
+#endif
+
 #define BOARD_ADC_PERIPH_5V_OC  (!px4_arch_gpioread(GPIO_nVDD_5V_PERIPH_OC))
 #define BOARD_ADC_HIPOWER_5V_OC (!px4_arch_gpioread(GPIO_nVDD_5V_HIPOWER_OC))