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Merged in alinjerpelea/nuttx (pull request #928)
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configs: spresense: add basic LCD configuration

* arch: arm: cxd56xx: add Graphics Engine

    Add driver for hardware image processor device

    to enable the hardware image processor set CXD56_GE2D=true

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* drivers: lcd: add ILI9340 LCD Single Chip Driver

    LCD Single Chip Driver, ILI9340, ILI Technology Corp.

    Required LCD driver settings:
    LCD_MAXCONTRAST should be 255, but any value >0 and <=255 will be accepted.
    LCD_MAXPOWER should be 1:  0=off, 1=on

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* drivers: lcd: JDI LPM013M091A LCD Driver

    JDI LPM013M091A LCD Driver.

    This driver doesn't support reading data.
    Recommended to use DMA to transfer data or displayed image would be
    broken.

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* configs: spresense: add basic LCD configuration

    add basic LCD configuration for spresense board

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* configs: spresense: add lpm013m091a LCD

    add device configuration for lpm013m091a LCD on spresense board

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* configs: spresense: add ili9340 LCD

    add device configuration for ili9340 LCD on spresense board

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* configs: spresense: add defconfig with LCD

    add defconfig with LCD for spresense board

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

Approved-by: Gregory Nutt <gnutt@nuttx.org>
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jerpelea authored and gregory-nutt committed Jul 3, 2019
1 parent 7815c3a commit 55a4029
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6 changes: 6 additions & 0 deletions arch/arm/src/cxd56xx/Kconfig
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Expand Up @@ -1172,4 +1172,10 @@ config CXD56_EMMC
Emmc driver for cxd56xx chip

endmenu

config CXD56_GE2D
bool "Graphics Engine"
default n
---help---
A hardware image processor device.
endmenu
4 changes: 4 additions & 0 deletions arch/arm/src/cxd56xx/Make.defs
Original file line number Diff line number Diff line change
Expand Up @@ -156,6 +156,10 @@ ifeq ($(CONFIG_CXD56_CHARGER),y)
CHIP_CSRCS += cxd56_charger.c
endif

ifeq ($(CONFIG_CXD56_GE2D),y)
CHIP_CSRCS += cxd56_ge2d.c
endif

ifeq ($(CONFIG_CXD56_SCU),y)
CHIP_CSRCS += cxd56_scu.c cxd56_scufifo.c
ifeq ($(CONFIG_CXD56_ADC),y)
Expand Down
283 changes: 283 additions & 0 deletions arch/arm/src/cxd56xx/cxd56_ge2d.c
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@@ -0,0 +1,283 @@
/****************************************************************************
* arch/arm/src/cxd56xx/cxd56_ge2d.c
*
* Copyright 2018 Sony Semiconductor Solutions Corporation
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name of Sony Semiconductor Solutions Corporation nor
* the names of its contributors may be used to endorse or promote
* products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/

/****************************************************************************
* Included Files
****************************************************************************/

#include <nuttx/config.h>

#include <nuttx/kmalloc.h>
#include <nuttx/fs/fs.h>
#include <nuttx/irq.h>
#include <queue.h>
#include <semaphore.h>
#include <stdio.h>
#include <stdint.h>
#include <string.h>
#include <debug.h>
#include <errno.h>

#include "up_arch.h"
#include "chip.h"
#include "cxd56_clock.h"

#include "hardware/cxd56_ge2d.h"

/****************************************************************************
* Private Function Prototypes
****************************************************************************/

static int ge2d_open(FAR struct file *filep);
static int ge2d_close(FAR struct file *filep);
static ssize_t ge2d_read(FAR struct file *filep, FAR char *buffer,
size_t len);
static ssize_t ge2d_write(FAR struct file *filep, FAR const char *buffer,
size_t len);
static int ge2d_ioctl(FAR struct file *filep, int cmd, unsigned long arg);
static int ge2d_semtake(sem_t *id);
static void ge2d_semgive(sem_t *id);
static int ge2d_irqhandler(int irq, FAR void *context, FAR void *arg);

/****************************************************************************
* Private Data
****************************************************************************/

static const struct file_operations g_ge2dfops =
{
.open = ge2d_open,
.close = ge2d_close,
.read = ge2d_read,
.write = ge2d_write,
.seek = 0,
.ioctl = ge2d_ioctl,
};

static sem_t g_wait;
static sem_t g_lock;

/****************************************************************************
* Private Functions
****************************************************************************/

/****************************************************************************
* Name: ge2d_semtake
****************************************************************************/

static int ge2d_semtake(sem_t *id)
{
while (sem_wait(id) != 0)
{
ASSERT(errno == EINTR);
}
return OK;
}

/****************************************************************************
* Name: ge2d_semgive
****************************************************************************/

static void ge2d_semgive(sem_t *id)
{
sem_post(id);
}

/****************************************************************************
* Name: ge2d_open
****************************************************************************/

static int ge2d_open(FAR struct file *filep)
{
return 0;
}

/****************************************************************************
* Name: ge2d_close
****************************************************************************/

static int ge2d_close(FAR struct file *filep)
{
return 0;
}

/****************************************************************************
* Name: ge2d_read
****************************************************************************/

static ssize_t ge2d_read(FAR struct file *filep, FAR char *buffer, size_t len)
{
return 0;
}

/****************************************************************************
* Name: ge2d_write
****************************************************************************/

static ssize_t ge2d_write(FAR struct file *filep,
FAR const char *buffer,
size_t len)
{
uint32_t bits;

/* GE2D wants 16 byte aligned address for operation buffer. */

if (((uintptr_t)buffer & 0xf) != 0)
{
set_errno(EINVAL);
return 0;
}

/* Get exclusive access */

ge2d_semtake(&g_lock);

/* Set operation buffer and start processing.
* Descriptor start address bit 0 is select to bus, always 1 (memory),
* can't set except 1 in this chip.
*/

putreg32((uint32_t)(uintptr_t)buffer | 1, GE2D_ADDRESS_DESCRIPTOR_START);
putreg32(GE2D_EXEC, GE2D_CMD_DESCRIPTOR);

/* Enable error and completion interrupts. */

bits = GE2D_INTR_WR_ERR | GE2D_INTR_RD_ERR | GE2D_INTR_NDE | GE2D_INTR_DSD |
GE2D_INTR_NDF;
putreg32(bits, GE2D_INTR_ENABLE);

/* Wait for interrupts for processing done. */

ge2d_semtake(&g_wait);

/* Disable interrupts */

putreg32(0, GE2D_INTR_ENABLE);

ge2d_semgive(&g_lock);

return len;
}

/****************************************************************************
* Name: ge2d_ioctl
****************************************************************************/

static int ge2d_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
{
int ret = -ENOTTY;

/* TODO: Should be implement features:
*
* - stop execution
* - debug for raster operation
*/

switch (cmd)
{
default:
break;
}

return ret;
}

/****************************************************************************
* Name: ge2d_irqhandler
****************************************************************************/

static int ge2d_irqhandler(int irq, FAR void *context, FAR void *arg)
{
uint32_t stat;

/* Clear interrupts */

stat = getreg32(GE2D_INTR_STAT);
putreg32(stat, GE2D_INTR_STAT);

/* TODO: output status to syslog */

/* Release semaphore anyway */

ge2d_semgive(&g_wait);

return OK;
}

/****************************************************************************
* Name: cxd56_ge2dinitialize
****************************************************************************/

int cxd56_ge2dinitialize(FAR const char *devname)
{
int ret;

sem_init(&g_lock, 0, 1);
sem_init(&g_wait, 0, 0);
sem_setprotocol(&g_wait, SEM_PRIO_NONE);

ret = register_driver(devname, &g_ge2dfops, 0666, NULL);
if (ret != 0)
{
return ERROR;
}

cxd56_img_ge2d_clock_enable();

/* Disable interrupts */

putreg32(0, GE2D_INTR_ENABLE);

irq_attach(CXD56_IRQ_GE2D, ge2d_irqhandler, NULL);
up_enable_irq(CXD56_IRQ_GE2D);

return OK;
}

/****************************************************************************
* Name: cxd56_ge2duninitialize
****************************************************************************/

void cxd56_ge2duninitialize(FAR const char *devname)
{
up_disable_irq(CXD56_IRQ_GE2D);
irq_detach(CXD56_IRQ_GE2D);

cxd56_img_ge2d_clock_disable();

sem_destroy(&g_lock);
sem_destroy(&g_wait);

unregister_driver(devname);
}
82 changes: 82 additions & 0 deletions arch/arm/src/cxd56xx/hardware/cxd56_ge2d.h
Original file line number Diff line number Diff line change
@@ -0,0 +1,82 @@
/****************************************************************************
* arch/arm/src/cxd56xx/hardware/cxd56_ge2d.h
*
* Copyright 2018 Sony Semiconductor Solutions Corporation
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name of Sony Semiconductor Solutions Corporation nor
* the names of its contributors may be used to endorse or promote
* products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/

#ifndef __SRC_CHIP_CXD56_GE2D_H
#define __SRC_CHIP_CXD56_GE2D_H

#include "hardware/cxd5602_memorymap.h"

/****************************************************************************
* Pre-processor Definitions
****************************************************************************/

#define GE2D_INTR_ENABLE (CXD56_GE2D_BASE+0x00)
#define GE2D_INTR_STAT (CXD56_GE2D_BASE+0x04)
#define GE2D_ADDRESS_DESCRIPTOR_START (CXD56_GE2D_BASE+0x08)
#define GE2D_STATUS (CXD56_GE2D_BASE+0x0c) /* Read */
#define GE2D_CMD_DESCRIPTOR (CXD56_GE2D_BASE+0x0c) /* Write */
#define GE2D_STAT_NORMAL_DESCRIPTOR_ADDRESS (CXD56_GE2D_BASE+0x10)
#define GE2D_STAT_CURRENT_DESCRIPTOR_ADDRESS (CXD56_GE2D_BASE+0x14)
#define GE2D_AHB_BURST_MODE (CXD56_GE2D_BASE+0x40)

/* Interrupt bits */

#define GE2D_INTR_WR_ERR (1 << 17)
#define GE2D_INTR_RD_ERR (1 << 16)
#define GE2D_INTR_DSD (1 << 8)
#define GE2D_INTR_NDE (1 << 3)
#define GE2D_INTR_NDB (1 << 2)
#define GE2D_INTR_NDF (1 << 1)
#define GE2D_INTR_HPU (1 << 0)

#define GE2D_INTR_ALL (GE2D_INTR_WR_ERR | GE2D_INTR_RD_ERR | \
GE2D_INTR_DSD | GE2D_INTR_NDE | GE2D_INTR_NDB | \
GE2D_INTR_NDF | GE2D_INTR_HPU)

/* Status bits */

#define GE2D_STAT_ISER (1 << 24)
#define GE2D_STAT_NDCR (1 << 8)
#define GE2D_STAT_SREQ (1 << 2)
#define GE2D_STAT_PREQ (1 << 1)
#define GE2D_STAT_NREQ (1 << 0)

/* Running control */

#define GE2D_NOP 0
#define GE2D_EXEC 1
#define GE2D_STOP 3

#endif /* __SRC_CHIP_CXD56_GE2D_H */
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