nuttx configs: disable nuttx timers which are used for PWM output

These are not required, and to be consistent we enforce disabling them now.
PX4 · Jan 29, 2020 · 43a0d4c · 43a0d4c
1 parent e48b618
commit 43a0d4c
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Showing 23 changed files with 93 additions and 53 deletions.
diff --git a/boards/airmind/mindpx-v2/nuttx-config/nsh/defconfig b/boards/airmind/mindpx-v2/nuttx-config/nsh/defconfig
@@ -191,9 +191,7 @@ CONFIG_STM32_SPI2=y
 CONFIG_STM32_SPI4=y
 CONFIG_STM32_TIM10=y
 CONFIG_STM32_TIM11=y
-CONFIG_STM32_TIM1=y
 CONFIG_STM32_TIM3=y
-CONFIG_STM32_TIM4=y
 CONFIG_STM32_TIM9=y
 CONFIG_STM32_UART4=y
 CONFIG_STM32_UART7=y

diff --git a/boards/av/x-v1/nuttx-config/nsh/defconfig b/boards/av/x-v1/nuttx-config/nsh/defconfig
@@ -213,12 +213,8 @@ CONFIG_STM32F7_SPI1=y
 CONFIG_STM32F7_SPI2=y
 CONFIG_STM32F7_SPI4=y
 CONFIG_STM32F7_SPI5=y
-CONFIG_STM32F7_TIM10=y
-CONFIG_STM32F7_TIM11=y
 CONFIG_STM32F7_TIM14=y
-CONFIG_STM32F7_TIM1=y
 CONFIG_STM32F7_TIM3=y
-CONFIG_STM32F7_TIM4=y
 CONFIG_STM32F7_UART4=y
 CONFIG_STM32F7_UART5=y
 CONFIG_STM32F7_UART7=y

diff --git a/boards/bitcraze/crazyflie/nuttx-config/nsh/defconfig b/boards/bitcraze/crazyflie/nuttx-config/nsh/defconfig
@@ -175,8 +175,6 @@ CONFIG_STM32_SAVE_CRASHDUMP=y
 CONFIG_STM32_SERIALBRK_BSDCOMPAT=y
 CONFIG_STM32_SERIAL_DISABLE_REORDERING=y
 CONFIG_STM32_SPI1=y
-CONFIG_STM32_TIM2=y
-CONFIG_STM32_TIM4=y
 CONFIG_STM32_USART2=y
 CONFIG_STM32_USART3=y
 CONFIG_STM32_USART6=y

diff --git a/boards/holybro/kakutef7/nuttx-config/nsh/defconfig b/boards/holybro/kakutef7/nuttx-config/nsh/defconfig
@@ -182,10 +182,6 @@ CONFIG_STM32F7_SERIAL_DISABLE_REORDERING=y
 CONFIG_STM32F7_SPI1=y
 CONFIG_STM32F7_SPI2=y
 CONFIG_STM32F7_SPI4=y
-CONFIG_STM32F7_TIM1=y
-CONFIG_STM32F7_TIM3=y
-CONFIG_STM32F7_TIM5=y
-CONFIG_STM32F7_TIM8=y
 CONFIG_STM32F7_UART4=y
 CONFIG_STM32F7_UART7=y
 CONFIG_STM32F7_USART1=y

diff --git a/boards/mro/ctrl-zero-f7/nuttx-config/nsh/defconfig b/boards/mro/ctrl-zero-f7/nuttx-config/nsh/defconfig
@@ -191,9 +191,7 @@ CONFIG_STM32F7_SPI2=y
 CONFIG_STM32F7_SPI5=y
 CONFIG_STM32F7_TIM10=y
 CONFIG_STM32F7_TIM11=y
-CONFIG_STM32F7_TIM1=y
 CONFIG_STM32F7_TIM3=y
-CONFIG_STM32F7_TIM4=y
 CONFIG_STM32F7_TIM9=y
 CONFIG_STM32F7_UART4=y
 CONFIG_STM32F7_UART7=y

diff --git a/boards/mro/x21-777/nuttx-config/nsh/defconfig b/boards/mro/x21-777/nuttx-config/nsh/defconfig
@@ -189,9 +189,7 @@ CONFIG_STM32F7_SERIAL_DISABLE_REORDERING=y
 CONFIG_STM32F7_SPI1=y
 CONFIG_STM32F7_SPI2=y
 CONFIG_STM32F7_TIM10=y
-CONFIG_STM32F7_TIM1=y
 CONFIG_STM32F7_TIM3=y
-CONFIG_STM32F7_TIM4=y
 CONFIG_STM32F7_TIM9=y
 CONFIG_STM32F7_UART4=y
 CONFIG_STM32F7_UART7=y

diff --git a/boards/mro/x21/nuttx-config/nsh/defconfig b/boards/mro/x21/nuttx-config/nsh/defconfig
@@ -189,9 +189,7 @@ CONFIG_STM32_SPI1=y
 CONFIG_STM32_SPI2=y
 CONFIG_STM32_TIM10=y
 CONFIG_STM32_TIM11=y
-CONFIG_STM32_TIM1=y
 CONFIG_STM32_TIM3=y
-CONFIG_STM32_TIM4=y
 CONFIG_STM32_TIM9=y
 CONFIG_STM32_UART4=y
 CONFIG_STM32_UART7=y

diff --git a/boards/nxp/fmuk66-v3/nuttx-config/nsh/defconfig b/boards/nxp/fmuk66-v3/nuttx-config/nsh/defconfig
@@ -68,9 +68,6 @@ CONFIG_KINETIS_EMAC_RMIICLK1588CLKIN=y
 CONFIG_KINETIS_ENET=y
 CONFIG_KINETIS_FLEXCAN0=y
 CONFIG_KINETIS_FLEXCAN1=y
-CONFIG_KINETIS_FTM0=y
-CONFIG_KINETIS_FTM2=y
-CONFIG_KINETIS_FTM3=y
 CONFIG_KINETIS_GPIOIRQ=y
 CONFIG_KINETIS_I2C0=y
 CONFIG_KINETIS_I2C1=y

diff --git a/boards/omnibus/f4sd/nuttx-config/nsh/defconfig b/boards/omnibus/f4sd/nuttx-config/nsh/defconfig
@@ -168,7 +168,6 @@ CONFIG_STM32_SPI1=y
 CONFIG_STM32_SPI2=y
 CONFIG_STM32_SPI3=y
 CONFIG_STM32_TIM1=y
-CONFIG_STM32_TIM3=y
 CONFIG_STM32_TIM5=y
 CONFIG_STM32_UART4=y
 CONFIG_STM32_USART1=y

diff --git a/boards/px4/fmu-v2/nuttx-config/nsh/defconfig b/boards/px4/fmu-v2/nuttx-config/nsh/defconfig
@@ -192,9 +192,7 @@ CONFIG_STM32_SPI2=y
 CONFIG_STM32_SPI4=y
 CONFIG_STM32_TIM10=y
 CONFIG_STM32_TIM11=y
-CONFIG_STM32_TIM1=y
 CONFIG_STM32_TIM3=y
-CONFIG_STM32_TIM4=y
 CONFIG_STM32_TIM9=y
 CONFIG_STM32_UART4=y
 CONFIG_STM32_UART7=y

diff --git a/boards/px4/fmu-v3/nuttx-config/nsh/defconfig b/boards/px4/fmu-v3/nuttx-config/nsh/defconfig
@@ -191,9 +191,7 @@ CONFIG_STM32_SPI2=y
 CONFIG_STM32_SPI4=y
 CONFIG_STM32_TIM10=y
 CONFIG_STM32_TIM11=y
-CONFIG_STM32_TIM1=y
 CONFIG_STM32_TIM3=y
-CONFIG_STM32_TIM4=y
 CONFIG_STM32_TIM9=y
 CONFIG_STM32_UART4=y
 CONFIG_STM32_UART7=y

diff --git a/boards/px4/fmu-v3/nuttx-config/stackcheck/defconfig b/boards/px4/fmu-v3/nuttx-config/stackcheck/defconfig
@@ -192,9 +192,7 @@ CONFIG_STM32_SPI2=y
 CONFIG_STM32_SPI4=y
 CONFIG_STM32_TIM10=y
 CONFIG_STM32_TIM11=y
-CONFIG_STM32_TIM1=y
 CONFIG_STM32_TIM3=y
-CONFIG_STM32_TIM4=y
 CONFIG_STM32_TIM9=y
 CONFIG_STM32_UART4=y
 CONFIG_STM32_UART7=y

diff --git a/boards/px4/fmu-v4/nuttx-config/nsh/defconfig b/boards/px4/fmu-v4/nuttx-config/nsh/defconfig
@@ -192,8 +192,6 @@ CONFIG_STM32_SPI4=y
 CONFIG_STM32_SPI_DMA=y
 CONFIG_STM32_TIM10=y
 CONFIG_STM32_TIM11=y
-CONFIG_STM32_TIM1=y
-CONFIG_STM32_TIM4=y
 CONFIG_STM32_TIM8=y
 CONFIG_STM32_TIM9=y
 CONFIG_STM32_UART4=y

diff --git a/boards/px4/fmu-v4/nuttx-config/stackcheck/defconfig b/boards/px4/fmu-v4/nuttx-config/stackcheck/defconfig
@@ -193,8 +193,6 @@ CONFIG_STM32_SPI4=y
 CONFIG_STM32_SPI_DMA=y
 CONFIG_STM32_TIM10=y
 CONFIG_STM32_TIM11=y
-CONFIG_STM32_TIM1=y
-CONFIG_STM32_TIM4=y
 CONFIG_STM32_TIM8=y
 CONFIG_STM32_TIM9=y
 CONFIG_STM32_UART4=y

diff --git a/boards/px4/fmu-v4pro/nuttx-config/nsh/defconfig b/boards/px4/fmu-v4pro/nuttx-config/nsh/defconfig
@@ -197,8 +197,6 @@ CONFIG_STM32_SPI6=y
 CONFIG_STM32_SPI_DMA=y
 CONFIG_STM32_TIM10=y
 CONFIG_STM32_TIM11=y
-CONFIG_STM32_TIM1=y
-CONFIG_STM32_TIM4=y
 CONFIG_STM32_TIM8=y
 CONFIG_STM32_TIM9=y
 CONFIG_STM32_UART4=y

diff --git a/boards/px4/fmu-v5/nuttx-config/critmonitor/defconfig b/boards/px4/fmu-v5/nuttx-config/critmonitor/defconfig
@@ -196,10 +196,6 @@ CONFIG_STM32F7_SPI5=y
 CONFIG_STM32F7_SPI6=y
 CONFIG_STM32F7_TIM10=y
 CONFIG_STM32F7_TIM11=y
-CONFIG_STM32F7_TIM1=y
-CONFIG_STM32F7_TIM3=y
-CONFIG_STM32F7_TIM4=y
-CONFIG_STM32F7_TIM9=y
 CONFIG_STM32F7_UART4=y
 CONFIG_STM32F7_UART7=y
 CONFIG_STM32F7_UART8=y

diff --git a/boards/px4/fmu-v5/nuttx-config/irqmonitor/defconfig b/boards/px4/fmu-v5/nuttx-config/irqmonitor/defconfig
@@ -196,10 +196,6 @@ CONFIG_STM32F7_SPI5=y
 CONFIG_STM32F7_SPI6=y
 CONFIG_STM32F7_TIM10=y
 CONFIG_STM32F7_TIM11=y
-CONFIG_STM32F7_TIM1=y
-CONFIG_STM32F7_TIM3=y
-CONFIG_STM32F7_TIM4=y
-CONFIG_STM32F7_TIM9=y
 CONFIG_STM32F7_UART4=y
 CONFIG_STM32F7_UART7=y
 CONFIG_STM32F7_UART8=y

diff --git a/boards/px4/fmu-v5/nuttx-config/nsh/defconfig b/boards/px4/fmu-v5/nuttx-config/nsh/defconfig
@@ -196,10 +196,6 @@ CONFIG_STM32F7_SPI5=y
 CONFIG_STM32F7_SPI6=y
 CONFIG_STM32F7_TIM10=y
 CONFIG_STM32F7_TIM11=y
-CONFIG_STM32F7_TIM1=y
-CONFIG_STM32F7_TIM3=y
-CONFIG_STM32F7_TIM4=y
-CONFIG_STM32F7_TIM9=y
 CONFIG_STM32F7_UART4=y
 CONFIG_STM32F7_UART7=y
 CONFIG_STM32F7_UART8=y

diff --git a/boards/px4/fmu-v5/nuttx-config/stackcheck/defconfig b/boards/px4/fmu-v5/nuttx-config/stackcheck/defconfig
@@ -196,10 +196,6 @@ CONFIG_STM32F7_SPI5=y
 CONFIG_STM32F7_SPI6=y
 CONFIG_STM32F7_TIM10=y
 CONFIG_STM32F7_TIM11=y
-CONFIG_STM32F7_TIM1=y
-CONFIG_STM32F7_TIM3=y
-CONFIG_STM32F7_TIM4=y
-CONFIG_STM32F7_TIM9=y
 CONFIG_STM32F7_UART4=y
 CONFIG_STM32F7_UART7=y
 CONFIG_STM32F7_UART8=y

diff --git a/boards/uvify/core/nuttx-config/nsh/defconfig b/boards/uvify/core/nuttx-config/nsh/defconfig
@@ -190,8 +190,6 @@ CONFIG_STM32_SPI2=y
 CONFIG_STM32_SPI4=y
 CONFIG_STM32_TIM10=y
 CONFIG_STM32_TIM11=y
-CONFIG_STM32_TIM1=y
-CONFIG_STM32_TIM4=y
 CONFIG_STM32_TIM8=y
 CONFIG_STM32_TIM9=y
 CONFIG_STM32_UART4=y

diff --git a/platforms/nuttx/src/px4/nxp/kinetis/include/px4_arch/io_timer_hw_description.h b/platforms/nuttx/src/px4/nxp/kinetis/include/px4_arch/io_timer_hw_description.h
@@ -111,6 +111,7 @@ static inline constexpr timer_io_channels_t initIOTimerChannel(const io_timers_t
 
 static inline constexpr io_timers_t initIOTimer(Timer::Timer timer)
 {
+	bool nuttx_config_timer_enabled = false;
 	io_timers_t ret{};
 
 	switch (timer) {
@@ -119,30 +120,45 @@ static inline constexpr io_timers_t initIOTimer(Timer::Timer timer)
 		ret.clock_register = KINETIS_SIM_SCGC6;
 		ret.clock_bit = SIM_SCGC6_FTM0;
 		ret.vectorno =  KINETIS_IRQ_FTM0;
+#ifdef CONFIG_KINETIS_FTM0
+		nuttx_config_timer_enabled = true;
+#endif
 		break;
 
 	case Timer::FTM1:
 		ret.base = KINETIS_FTM1_BASE;
 		ret.clock_register = KINETIS_SIM_SCGC6;
 		ret.clock_bit = SIM_SCGC6_FTM1;
 		ret.vectorno =  KINETIS_IRQ_FTM1;
+#ifdef CONFIG_KINETIS_FTM1
+		nuttx_config_timer_enabled = true;
+#endif
 		break;
 
 	case Timer::FTM2:
 		ret.base = KINETIS_FTM2_BASE;
 		ret.clock_register = KINETIS_SIM_SCGC3;
 		ret.clock_bit = SIM_SCGC3_FTM2;
 		ret.vectorno =  KINETIS_IRQ_FTM2;
+#ifdef CONFIG_KINETIS_FTM2
+		nuttx_config_timer_enabled = true;
+#endif
 		break;
 
 	case Timer::FTM3:
 		ret.base = KINETIS_FTM3_BASE;
 		ret.clock_register = KINETIS_SIM_SCGC3;
 		ret.clock_bit = SIM_SCGC3_FTM3;
 		ret.vectorno =  KINETIS_IRQ_FTM3;
+#ifdef CONFIG_KINETIS_FTM3
+		nuttx_config_timer_enabled = true;
+#endif
 		break;
 	}
 
+	// This is not strictly required, but for consistency let's make sure NuttX timers are disabled
+	constexpr_assert(!nuttx_config_timer_enabled, "IO Timer requires NuttX timer config to be disabled (KINETIS_FTMx)");
+
 	return ret;
 }
 

diff --git a/platforms/nuttx/src/px4/stm/stm32_common/include/px4_arch/io_timer_hw_description.h b/platforms/nuttx/src/px4/stm/stm32_common/include/px4_arch/io_timer_hw_description.h
@@ -104,6 +104,7 @@ static inline constexpr timer_io_channels_t initIOTimerChannelOutputClear(const
 
 static inline constexpr io_timers_t initIOTimer(Timer::Timer timer, DMA dshot_dma = {})
 {
+	bool nuttx_config_timer_enabled = false;
 	io_timers_t ret{};
 
 	switch (timer) {
@@ -113,6 +114,9 @@ static inline constexpr io_timers_t initIOTimer(Timer::Timer timer, DMA dshot_dm
 		ret.clock_bit = RCC_APB2ENR_TIM1EN;
 		ret.clock_freq = STM32_APB2_TIM1_CLKIN;
 		ret.vectorno =  STM32_IRQ_TIM1CC;
+#if defined(CONFIG_STM32_TIM1) || defined(CONFIG_STM32F7_TIM1)
+		nuttx_config_timer_enabled = true;
+#endif
 		break;
 
 	case Timer::Timer2:
@@ -121,6 +125,9 @@ static inline constexpr io_timers_t initIOTimer(Timer::Timer timer, DMA dshot_dm
 		ret.clock_bit = RCC_APB1ENR_TIM2EN;
 		ret.clock_freq = STM32_APB1_TIM2_CLKIN;
 		ret.vectorno =  STM32_IRQ_TIM2;
+#if defined(CONFIG_STM32_TIM2) || defined(CONFIG_STM32F7_TIM2)
+		nuttx_config_timer_enabled = true;
+#endif
 		break;
 
 	case Timer::Timer3:
@@ -129,6 +136,9 @@ static inline constexpr io_timers_t initIOTimer(Timer::Timer timer, DMA dshot_dm
 		ret.clock_bit = RCC_APB1ENR_TIM3EN;
 		ret.clock_freq = STM32_APB1_TIM3_CLKIN;
 		ret.vectorno =  STM32_IRQ_TIM3;
+#if defined(CONFIG_STM32_TIM3) || defined(CONFIG_STM32F7_TIM3)
+		nuttx_config_timer_enabled = true;
+#endif
 		break;
 
 	case Timer::Timer4:
@@ -137,6 +147,9 @@ static inline constexpr io_timers_t initIOTimer(Timer::Timer timer, DMA dshot_dm
 		ret.clock_bit = RCC_APB1ENR_TIM4EN;
 		ret.clock_freq = STM32_APB1_TIM4_CLKIN;
 		ret.vectorno =  STM32_IRQ_TIM4;
+#if defined(CONFIG_STM32_TIM4) || defined(CONFIG_STM32F7_TIM4)
+		nuttx_config_timer_enabled = true;
+#endif
 		break;
 
 	case Timer::Timer5:
@@ -145,6 +158,9 @@ static inline constexpr io_timers_t initIOTimer(Timer::Timer timer, DMA dshot_dm
 		ret.clock_bit = RCC_APB1ENR_TIM5EN;
 		ret.clock_freq = STM32_APB1_TIM5_CLKIN;
 		ret.vectorno =  STM32_IRQ_TIM5;
+#if defined(CONFIG_STM32_TIM5) || defined(CONFIG_STM32F7_TIM5)
+		nuttx_config_timer_enabled = true;
+#endif
 		break;
 
 	case Timer::Timer6:
@@ -153,6 +169,9 @@ static inline constexpr io_timers_t initIOTimer(Timer::Timer timer, DMA dshot_dm
 		ret.clock_bit = RCC_APB1ENR_TIM6EN;
 		ret.clock_freq = STM32_APB1_TIM6_CLKIN;
 		ret.vectorno =  STM32_IRQ_TIM6;
+#if defined(CONFIG_STM32_TIM6) || defined(CONFIG_STM32F7_TIM6)
+		nuttx_config_timer_enabled = true;
+#endif
 		break;
 
 	case Timer::Timer7:
@@ -161,6 +180,9 @@ static inline constexpr io_timers_t initIOTimer(Timer::Timer timer, DMA dshot_dm
 		ret.clock_bit = RCC_APB1ENR_TIM7EN;
 		ret.clock_freq = STM32_APB1_TIM7_CLKIN;
 		ret.vectorno =  STM32_IRQ_TIM7;
+#if defined(CONFIG_STM32_TIM7) || defined(CONFIG_STM32F7_TIM7)
+		nuttx_config_timer_enabled = true;
+#endif
 		break;
 
 #ifdef RCC_APB2ENR_TIM8EN
@@ -171,6 +193,9 @@ static inline constexpr io_timers_t initIOTimer(Timer::Timer timer, DMA dshot_dm
 		ret.clock_bit = RCC_APB2ENR_TIM8EN;
 		ret.clock_freq = STM32_APB2_TIM8_CLKIN;
 		ret.vectorno =  STM32_IRQ_TIM8CC;
+#if defined(CONFIG_STM32_TIM8) || defined(CONFIG_STM32F7_TIM8)
+		nuttx_config_timer_enabled = true;
+#endif
 		break;
 #endif
 
@@ -182,6 +207,9 @@ static inline constexpr io_timers_t initIOTimer(Timer::Timer timer, DMA dshot_dm
 		ret.clock_bit = RCC_APB2ENR_TIM9EN;
 		ret.clock_freq = STM32_APB2_TIM9_CLKIN;
 		ret.vectorno =  STM32_IRQ_TIM9;
+#if defined(CONFIG_STM32_TIM9) || defined(CONFIG_STM32F7_TIM9)
+		nuttx_config_timer_enabled = true;
+#endif
 		break;
 #endif
 
@@ -193,6 +221,9 @@ static inline constexpr io_timers_t initIOTimer(Timer::Timer timer, DMA dshot_dm
 		ret.clock_bit = RCC_APB2ENR_TIM10EN;
 		ret.clock_freq = STM32_APB2_TIM10_CLKIN;
 		ret.vectorno =  STM32_IRQ_TIM10;
+#if defined(CONFIG_STM32_TIM10) || defined(CONFIG_STM32F7_TIM10)
+		nuttx_config_timer_enabled = true;
+#endif
 		break;
 #endif
 
@@ -204,6 +235,9 @@ static inline constexpr io_timers_t initIOTimer(Timer::Timer timer, DMA dshot_dm
 		ret.clock_bit = RCC_APB2ENR_TIM11EN;
 		ret.clock_freq = STM32_APB2_TIM11_CLKIN;
 		ret.vectorno =  STM32_IRQ_TIM11;
+#if defined(CONFIG_STM32_TIM11) || defined(CONFIG_STM32F7_TIM11)
+		nuttx_config_timer_enabled = true;
+#endif
 		break;
 #endif
 
@@ -215,6 +249,9 @@ static inline constexpr io_timers_t initIOTimer(Timer::Timer timer, DMA dshot_dm
 		ret.clock_bit = RCC_APB1ENR_TIM12EN;
 		ret.clock_freq = STM32_APB1_TIM12_CLKIN;
 		ret.vectorno =  STM32_IRQ_TIM12;
+#if defined(CONFIG_STM32_TIM12) || defined(CONFIG_STM32F7_TIM12)
+		nuttx_config_timer_enabled = true;
+#endif
 		break;
 #endif
 
@@ -226,6 +263,9 @@ static inline constexpr io_timers_t initIOTimer(Timer::Timer timer, DMA dshot_dm
 	default: break;
 	}
 
+	// This is not strictly required, but for consistency let's make sure NuttX timers are disabled
+	constexpr_assert(!nuttx_config_timer_enabled, "IO Timer requires NuttX timer config to be disabled (STM32_TIMx)");
+
 	// DShot
 	if (dshot_dma.index != DMA::Invalid) {
 		ret.dshot.dma_base = getDMABaseRegister(dshot_dma);
@@ -235,4 +275,3 @@ static inline constexpr io_timers_t initIOTimer(Timer::Timer timer, DMA dshot_dm
 	return ret;
 }
 
-