Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Update SPV_INTEL_fpga_loop_control extension to revision E #62

Merged
merged 1 commit into from
Mar 16, 2020

Conversation

mkinsner
Copy link

No description provided.

vmaksimo added a commit to vmaksimo/SPIRV-LLVM-Translator that referenced this pull request Mar 13, 2020
Specification can be found here:
KhronosGroup/SPIRV-Registry#62

As per revision C -> revision E transition in the spec, patch introduces
translation of the following loop controls:
* PipelineDisableINTEL
* LoopCoalesceINTEL
* MaxInterleavingINTEL
* SpeculatedIterationsINTEL
@johnkslang johnkslang merged commit 24d6cad into KhronosGroup:master Mar 16, 2020
vmaksimo added a commit to vmaksimo/SPIRV-LLVM-Translator that referenced this pull request Mar 24, 2020
Specification can be found here:
KhronosGroup/SPIRV-Registry#62

As per revision C -> revision E transition in the spec, patch introduces
translation of the following loop controls:
* PipelineDisableINTEL
* LoopCoalesceINTEL
* MaxInterleavingINTEL
* SpeculatedIterationsINTEL
AlexeySotkin pushed a commit to KhronosGroup/SPIRV-LLVM-Translator that referenced this pull request Mar 27, 2020
Specification can be found here:
KhronosGroup/SPIRV-Registry#62

As per revision C -> revision E transition in the spec, patch introduces
translation of the following loop controls:
* PipelineDisableINTEL
* LoopCoalesceINTEL
* MaxInterleavingINTEL
* SpeculatedIterationsINTEL
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
None yet
Projects
None yet
Development

Successfully merging this pull request may close these issues.

2 participants