Translate new set of Intel FPGA Loop Controls #457
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mlychkov
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Mar 20, 2020
AGindinson
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Mar 23, 2020
Specification can be found here: KhronosGroup/SPIRV-Registry#62 As per revision C -> revision E transition in the spec, patch introduces translation of the following loop controls: * PipelineDisableINTEL * LoopCoalesceINTEL * MaxInterleavingINTEL * SpeculatedIterationsINTEL
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AGindinson
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Mar 25, 2020
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LGTM besides a minor comment. @AlexeySotkin, could you please take a look?
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LGTM. |
AlexeySotkin
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Mar 27, 2020
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Specification can be found here:
KhronosGroup/SPIRV-Registry#62
As per revision C -> revision E transition in the spec, patch introduces
translation of the following loop controls: