-
-
Notifications
You must be signed in to change notification settings - Fork 2.5k
New issue
Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.
By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.
Already on GitHub? Sign in to your account
Append disabled LLVM CPU features after enabled ones #21501
base: master
Are you sure you want to change the base?
Conversation
From a glance at This would also explain some weird behavior we've seen previously where the CPU features should be correct, but some things end up being unexpectedly enabled regardless. |
Some extra nuance here: llvm/llvm-project@72a895336b1e4 |
1e91c6b
to
552af8c
Compare
So a problem here is that Zig will process Meanwhile, as mentioned above, LLVM will process My point being: While this PR will improve the situation significantly, it won't completely solve the problem as you can still get into situations where a feature is enabled in Zig but disabled in LLVM. I personally don't like the Zig behavior here. If you disable feature A that feature B depends on to work, you can't actually say that you have feature B enabled - that's nonsense. I think LLVM actually gets this right, not just in terms of handling dependencies, but also in terms of order; I find it highly unintuitive that @andrewrk I'm curious to hear your thoughts on this. The CPU feature parsing was implemented quite a few years ago, so I don't know why it was done this way in particular. I would much prefer if we handled dependencies and ordering the same way as LLVM, if you're open to that. It would also help towards #12227 (comment). |
I agree from your comment that LLVM's handling seems more useful overall, except for this behavior: IMO the more robust option would be to error if a set includes an option that was explicitly specified conflicting prior. (So |
This PR attempts to resolve #21473, where LLVM uses FP registers on aarch64 when
-fp-armv8
is present.I traced this down to the
llvm_cpu_features
property of a resolved target. Features in this string is ordered bytarget.cpu.arch.allFeaturesList()
, resulting in a feature string like... ,-fp-armv8, ... ,+v8.2a
.I suspect that the way LLVM parses this string makes latter features overwrite earlier ones.
+v8.2a
appearing after-fp-armv8
would enable FPU again. Appending disabled features after enabled ones has indeed fixed this issue.Some things to consider with this fix:
+feature
after-feature
ever required? This is a problem only when-feature
is a superset of+feature
. In general we want subsets appear after supersets. Zig CPU features have the notion of dependency, but that doesn't fully encapsulate the superset and subset relations, especially not for using with LLVM.Frist time PR 🤞