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aarch64 llvm 14 regression with vectors: Assertion `mutationIsSane(Rule, Query, Mutation) && "legality mutation invalid for match"' failed #12013

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andrewrk opened this issue Jul 6, 2022 · 1 comment · Fixed by #21339
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arch-aarch64 64-bit ARM backend-llvm The LLVM backend outputs an LLVM IR Module. bug Observed behavior contradicts documented or intended behavior contributor friendly This issue is limited in scope and/or knowledge of Zig internals. upstream An issue with a third party project that Zig uses.
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@andrewrk
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andrewrk commented Jul 6, 2022

Zig Version: 0.10.0-dev.2876+fbd6c8832

This test case regressed with the update from LLVM 13 to 14:

test "@ctz vectors" {
    try testCtzVectors();
    comptime try testCtzVectors();
}

fn testCtzVectors() !void {
    @setEvalBranchQuota(10_000);
    try testOneCtzVector(u8, 64, @splat(64, @as(u8, 0b10100000)), @splat(64, @as(u4, 5)));
    try testOneCtzVector(u8, 64, @splat(64, @as(u8, 0b10001010)), @splat(64, @as(u4, 1)));
    try testOneCtzVector(u8, 64, @splat(64, @as(u8, 0b00000000)), @splat(64, @as(u4, 8)));
    try testOneCtzVector(u16, 64, @splat(64, @as(u16, 0b00000000)), @splat(64, @as(u5, 16)));
}

fn testOneCtzVector(
    comptime T: type,
    comptime len: u32,
    x: @Vector(len, T),
    expected: @Vector(len, u32),
) !void {
    try expectVectorsEqual(@ctz(T, x), expected);
}
[nix-shell:~/dev/zig/build-llvm14-debug]$ stage1/bin/zig build-obj test.ll -target aarch64-linux-none
zig: /home/andy/Downloads/llvm-project-14/llvm/lib/CodeGen/GlobalISel/LegalizerInfo.cpp:198: llvm::LegalizeActionStep llvm::LegalizeRuleSet::apply(const llvm::LegalityQuery&) const: Assertion `mutationIsSane(Rule, Query, Mutation) && "legality mutation invalid for match"' failed.

Reduced LLVM IR:

define internal fastcc i16 @testOneCtzVector.2() {
Entry:
  %0 = call <64 x i16> @llvm.cttz.v64i16(<64 x i16> zeroinitializer, i1 false)
  %1 = trunc <64 x i16> %0 to <64 x i5>
  store <64 x i5> %1, <64 x i5>* null, align 64
  ret i16 0
}

; Function Attrs: nofree nosync nounwind readnone speculatable willreturn
declare <64 x i16> @llvm.cttz.v64i16(<64 x i16>, i1 immarg) #0

attributes #0 = { nofree nosync nounwind readnone speculatable willreturn }

Upstream bug report: llvm/llvm-project#56398

@andrewrk andrewrk added bug Observed behavior contradicts documented or intended behavior contributor friendly This issue is limited in scope and/or knowledge of Zig internals. upstream An issue with a third party project that Zig uses. arch-aarch64 64-bit ARM backend-llvm The LLVM backend outputs an LLVM IR Module. labels Jul 6, 2022
@andrewrk andrewrk added this to the 0.11.0 milestone Jul 6, 2022
andrewrk added a commit that referenced this issue Jul 6, 2022
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andrewrk added a commit that referenced this issue Dec 28, 2022
This reverts commit 3370d58.

This commit was done with an LLVM build that did not have assertions
enabled. There are LLVM assertions being triggered due to this commit.

Reopens #10627
Reopens #12013
Reopens #12027
@andrewrk
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Reopened by 5ca1753

DivergentClouds pushed a commit to DivergentClouds/zig that referenced this issue Sep 24, 2024
richerfu pushed a commit to richerfu/zig that referenced this issue Oct 28, 2024
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Labels
arch-aarch64 64-bit ARM backend-llvm The LLVM backend outputs an LLVM IR Module. bug Observed behavior contradicts documented or intended behavior contributor friendly This issue is limited in scope and/or knowledge of Zig internals. upstream An issue with a third party project that Zig uses.
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