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Implement TSIP RSA Public Enc/Private Dec #8122

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Description

Add TSIP RSA public Encryption/Private Decryption

Testing

Run unit test on RX72N

Checklist

  • added tests
  • updated/added doxygen
  • updated appropriate READMEs
  • Updated manual and documentation

@miyazakh miyazakh self-assigned this Oct 29, 2024
@dgarske dgarske self-requested a review October 29, 2024 13:58
@dgarske dgarske self-assigned this Oct 29, 2024
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[check-source-text] [2 of 7] [wolfssl]
trailing whitespace:
./IDE/Renesas/e2studio/RX72N/EnvisionKit/wolfssl_demo/user_settings.h:249:····
./wolfcrypt/src/port/Renesas/renesas_tsip_rsa.c:238:················
./wolfcrypt/src/port/Renesas/renesas_tsip_rsa.c:258:················
weird control chars, hard tabs, CRs, trailing whitespace:
./wolfcrypt/src/port/Renesas/renesas_common.c:262:        »(info->pk.rsa.type == RSA_PRIVATE_DECRYPT ||
./wolfcrypt/src/port/Renesas/renesas_common.c:278:        »» info->pk.rsa.type == RSA_PUBLIC_DECRYPT) {
overlong lines added:
wolfcrypt/src/port/Renesas/renesas_tsip_rsa.c:249                                                             "1024 or 2048 bits.");
wolfcrypt/src/port/Renesas/renesas_tsip_rsa.c:269                                                             "1024 or 2048 bits.");

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trailing whitespace:
./IDE/Renesas/e2studio/RX72N/EnvisionKit/wolfssl_demo/user_settings.h:249:····
    check-source-text fail_A```

@dgarske dgarske removed their assignment Oct 29, 2024
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Thank you. Awaiting merge until customer provides feedback.

@dgarske dgarske assigned dgarske and unassigned miyazakh Oct 29, 2024
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2 participants