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WOLFSSL_SP_INT_NEGATIVE declaration for all Espressif chipsets #6374

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merged 4 commits into from
May 4, 2023
Merged

WOLFSSL_SP_INT_NEGATIVE declaration for all Espressif chipsets #6374

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1a0a83c
WOLFSSL_SP_INT_NEGATIVE declaration for all Espressif chipsets
gojimmypi May 3, 2023
19961ae
correct naming for WOLFSSL_SHA384 on ESP32-C3
gojimmypi May 3, 2023
2ec486e
code review changes; common handling of negative MATH_INT_T
gojimmypi May 3, 2023
7aa07f0
code review update: address mixed declaration with code.
gojimmypi May 3, 2023
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51 changes: 29 additions & 22 deletions wolfcrypt/src/port/Espressif/esp32_mp.c
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Original file line number Diff line number Diff line change
Expand Up @@ -330,7 +330,22 @@ static int esp_get_rinv(MATH_INT_T *rinv, MATH_INT_T *M, word32 exp)
/* Z = X * Y; */
int esp_mp_mul(MATH_INT_T* X, MATH_INT_T* Y, MATH_INT_T* Z)
{
int ret = 0;
int ret;

#ifdef WOLFSSL_SP_INT_NEGATIVE
/* neg check: X*Y becomes negative */
int neg;

/* aka (X->sign == Y->sign) ? MP_ZPOS : MP_NEG; , but with mp_isneg(): */
neg = (mp_isneg(X) == mp_isneg(Y)) ? MP_ZPOS : MP_NEG;
if (neg) {
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/* Negative numbers are relatively infrequent.
* May be interesting during verbose debugging: */
ESP_LOGV(TAG, "mp_isneg(X) = %d; mp_isneg(Y) = %d; neg = %d ",
mp_isneg(X), mp_isneg(Y), neg);
}
#endif
ret = MP_OKAY; /* assume success until proven wrong */

#if CONFIG_IDF_TARGET_ESP32S3

Expand All @@ -345,10 +360,6 @@ int esp_mp_mul(MATH_INT_T* X, MATH_INT_T* Y, MATH_INT_T* Z)
int WordsForOperand = bits2words(MinXYBits);
int WordsForResult = bits2words(BitsInX + BitsInY);

#ifdef WOLFSSL_SP_INT_NEGATIVE
int neg;
neg = (X->sign == Y->sign) ? MP_ZPOS : MP_NEG;
#endif
/* Make sure we are within capabilities of hardware. */
if ( (WordsForOperand * BITS_IN_ONE_WORD) > ESP_HW_MULTI_RSAMAX_BITS ) {
ESP_LOGW(TAG, "exceeds max bit length(2048)");
Expand Down Expand Up @@ -377,8 +388,9 @@ int esp_mp_mul(MATH_INT_T* X, MATH_INT_T* Y, MATH_INT_T* Z)
return ret;
}

/* 2. Disable completion interrupt signal; we don't use. */
DPORT_REG_WRITE(RSA_INTERRUPT_REG, 0); // 0 => no interrupt; 1 => interrupt on completion.
/* 2. Disable completion interrupt signal; we don't use.
** 0 => no interrupt; 1 => interrupt on completion. */
DPORT_REG_WRITE(RSA_INTERRUPT_REG, 0);

/* 3. Write number of words required for result. */
if ( (WordsForOperand * BITS_IN_ONE_WORD * 2) > ESP_HW_RSAMAX_BIT) {
Expand Down Expand Up @@ -407,11 +419,6 @@ int esp_mp_mul(MATH_INT_T* X, MATH_INT_T* Y, MATH_INT_T* Z)
/* 7. clear and release HW */
esp_mp_hw_unlock();

#ifdef WOLFSSL_SP_INT_NEGATIVE
Z->sign = (Z->used > 0) ? neg : MP_ZPOS;
#endif

return ret;
/* end if CONFIG_IDF_TARGET_ESP32S3 */

#else /* not CONFIG_IDF_TARGET_ESP32S3 */
Expand All @@ -422,11 +429,6 @@ int esp_mp_mul(MATH_INT_T* X, MATH_INT_T* Y, MATH_INT_T* Z)
word32 maxWords_sz;
word32 hwWords_sz;

/* neg check - X*Y becomes negative */
#ifdef WOLFSSL_SP_INT_NEGATIVE
neg = mp_isneg(X) != mp_isneg(Y) ? 1 : 0;
#endif

/* ask bits number */
Xs = mp_count_bits(X);
Ys = mp_count_bits(Y);
Expand Down Expand Up @@ -492,15 +494,18 @@ int esp_mp_mul(MATH_INT_T* X, MATH_INT_T* Y, MATH_INT_T* Z)
/* step.7 clear and release HW */
esp_mp_hw_unlock();

#endif /* CONFIG_IDF_TARGET_ESP32S3 or not */

/* common exit for all chipset types */
#ifdef WOLFSSL_SP_INT_NEGATIVE
if (!mp_iszero(Z) && neg) {
/* for non-zero negative numbers, set negative flag for our result:
* Z->sign = FP_NEG */
mp_setneg(Z);
}
#endif

return ret;
#endif /* CONFIG_IDF_TARGET_ESP32S3 or not */
}

/* Z = X * Y (mod M) */
Expand Down Expand Up @@ -596,8 +601,9 @@ int esp_mp_mulmod(MATH_INT_T* X, MATH_INT_T* Y, MATH_INT_T* M, MATH_INT_T* Z)
return ret;
}

/* 2. Disable completion interrupt signal; we don't use. */
DPORT_REG_WRITE(RSA_INTERRUPT_REG, 0); // 0 => no interrupt; 1 => interrupt on completion.
/* 2. Disable completion interrupt signal; we don't use.
** 0 => no interrupt; 1 => interrupt on completion. */
DPORT_REG_WRITE(RSA_INTERRUPT_REG, 0);

/* 3. Write (N_result_bits/32 - 1) to the RSA_MODE_REG. */
OperandBits = max(max(Xs, Ys), Ms);
Expand Down Expand Up @@ -815,8 +821,9 @@ int esp_mp_exptmod(MATH_INT_T* X, MATH_INT_T* Y, word32 Ys, MATH_INT_T* M, MATH_
return ret;
}

/* 2. Disable completion interrupt signal; we don't use. */
DPORT_REG_WRITE(RSA_INTERRUPT_REG, 0); // 0 => no interrupt; 1 => interrupt on completion.
/* 2. Disable completion interrupt signal; we don't use.
** 0 => no interrupt; 1 => interrupt on completion. */
DPORT_REG_WRITE(RSA_INTERRUPT_REG, 0);

/* 3. Write (N_result_bits/32 - 1) to the RSA_MODE_REG. */
OperandBits = max(max(Xs, Ys), Ms);
Expand Down
2 changes: 1 addition & 1 deletion wolfcrypt/src/port/Espressif/esp32_sha.c
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Original file line number Diff line number Diff line change
Expand Up @@ -855,7 +855,7 @@ static int esp_sha_start_process(WC_ESP32SHA* sha)
break;
#if defined(WOLFSSL_SHA384)
case SHA2_384:
uHardwareAlgorithm = 3;
HardwareAlgorithm = 3;
break;
#endif
#if defined(WOLFSSL_SHA512)
Expand Down