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Added memory region for hashing
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zmckevitt committed Oct 2, 2023
1 parent cdc3457 commit 82201db
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Showing 2 changed files with 34 additions and 8 deletions.
17 changes: 16 additions & 1 deletion usr/init/Cargo.toml
Original file line number Diff line number Diff line change
Expand Up @@ -67,4 +67,19 @@ smoke = []
# Do latency measurements in benchmarks
latency = []

all-tests = ["test-print", "test-map", "test-alloc", "test-upcall", "test-scheduler", "test-syscalls", "test-rump-tmpfs", "test-rump-net", "test-fs", "test-phys-alloc"]
all-tests = [
"test-print",
"test-map",
"test-alloc",
"test-upcall",
"test-scheduler",
#"test-scheduler-smp", # Doesn't return
"test-syscalls",
"test-rump-tmpfs",
"test-rump-net",
"test-fs",
"test-phys-alloc",
# "test-request-core-remote", TODO: used only for rackscale tests right now
#"test-fs-prop", # needs userspace
#"test-pmem-alloc", # needs SMP
]
25 changes: 18 additions & 7 deletions usr/init/src/memhash/mod.rs
Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
use alloc::sync::Arc;
use alloc::vec::Vec;
use alloc::{vec, vec::Vec};
use core::ptr;

use core::sync::atomic::{AtomicUsize, Ordering};
Expand All @@ -9,21 +9,25 @@ use x86::bits64::paging::VAddr;

use lineup::tls2::{Environment, SchedulerControlBlock};

use base64ct::{Base64, Encoding};
// use base64ct::{Base64, Encoding};
use md5::{Digest, Md5};

static POOR_MANS_BARRIER: AtomicUsize = AtomicUsize::new(0);

const CHUNK_SIZE: usize = 1024;

// Hash function
// Equivalent to 1 operation
fn hashmem(core_id: usize) {
fn hashmem(core_id: usize, buffer: &Arc<Vec<u8>>) {
let offset = core_id * CHUNK_SIZE;
let buffer: [u8; CHUNK_SIZE] = buffer[offset..offset + CHUNK_SIZE].try_into().unwrap();
let mut hasher = Md5::new();
hasher.update(b"hello world");
hasher.update(buffer);
let hash = hasher.finalize();
// Base64::encode_string(&hash);
}

fn thread_routine(core_id: usize, cur_cores: usize, tot_cores: usize) {
fn thread_routine(core_id: usize, cur_cores: usize, tot_cores: usize, buffer: &Arc<Vec<u8>>) {
// Synchronize all cores
POOR_MANS_BARRIER.fetch_sub(1, Ordering::Relaxed);
while POOR_MANS_BARRIER.load(Ordering::Relaxed) != 0 {
Expand All @@ -34,7 +38,7 @@ fn thread_routine(core_id: usize, cur_cores: usize, tot_cores: usize) {

let start = rawtime::Instant::now();
while start.elapsed().as_secs() < 1 {
let _ = hashmem(core_id);
let _ = hashmem(core_id, buffer);
ops += 1
}
info!("{},memhash,{},{},{}", core_id, ops, cur_cores, tot_cores);
Expand All @@ -46,14 +50,16 @@ unsafe extern "C" fn thread_routine_trampoline(thread_params: *mut u8) -> *mut u
let core_id = params.core_id;
let cur_cores = params.cur_cores;
let tot_cores = params.tot_cores;
thread_routine(core_id, cur_cores, tot_cores);
let buffer = &params.buffer;
thread_routine(core_id, cur_cores, tot_cores, buffer);
ptr::null_mut()
}

struct ThreadParams {
core_id: usize,
cur_cores: usize,
tot_cores: usize,
buffer: Arc<Vec<u8>>,
}

pub fn bench(ncores: Option<usize>) {
Expand All @@ -63,6 +69,9 @@ pub fn bench(ncores: Option<usize>) {
let current_core = vibrio::syscalls::System::core_id().expect("Can't get core id");
let mut core_ids = Vec::with_capacity(cores);

// Generate byte vector of values
let mem_region: Arc<Vec<u8>> = Arc::new(vec![0; ncores.unwrap() * CHUNK_SIZE]);

for hwthread in hwthreads.iter().take(cores) {
// Reserve next core
if hwthread.id != current_core {
Expand All @@ -86,6 +95,7 @@ pub fn bench(ncores: Option<usize>) {

let cores_in_use = core_ids.len();
let core_ids_copy = core_ids.clone();
let buffer_ptr = mem_region.clone();

// Spawn threads
s.spawn(
Expand All @@ -99,6 +109,7 @@ pub fn bench(ncores: Option<usize>) {
core_id: core_id,
cur_cores: cores_in_use.clone(),
tot_cores: ncores.unwrap().clone(),
buffer: buffer_ptr.clone(),
};

thandles.push(
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