Added PD fault module (#243)

* Added PD fault module * Moving unnecessary include * Exposing only update routine * Added requested fixes * Removed unnecessary things
uw-midsun · Jan 8, 2024 · 23b2a16 · 23b2a16
1 parent 9e2b3dc
commit 23b2a16
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diff --git a/libraries/codegen/boards/power_distribution.yaml b/libraries/codegen/boards/power_distribution.yaml
@@ -67,3 +67,11 @@
           length: 8
         pd_fault:
           length: 8
+    pd_status:
+      id: 1
+      target:
+        centre_console:
+          watchdog: 0
+      signals:
+        fault_bitset:
+          length: 8
diff --git a/libraries/ms-common/inc/exported_enums.h b/libraries/ms-common/inc/exported_enums.h
@@ -101,6 +101,12 @@ typedef enum {
   EE_PWR_SEL_FAULT_AUX_OVERVOLTAGE_BIT,
 } PowerSelectFaultMasks;
 
+typedef enum {
+  EE_PD_STATUS_FAULT_BITSET_AUX_FAULT_BIT = 0,
+  EE_PD_STATUS_FAULT_BITSET_DCDC_FAULT_BIT,
+  NUM_EE_PD_STATUS_FAULT_BITSET_BITS,
+} PdStatusFaultBitsetMasks;
+
 #define EE_PWR_SEL_FAULT_PWR_SUPPLY_OVERCURRENT_MASK \
   (1 << EE_PWR_SEL_FAULT_PWR_SUPPLY_OVERCURRENT_BIT)
 
@@ -119,6 +125,10 @@ typedef enum {
 
 #define EE_PWR_SEL_FAULT_AUX_OVERVOLTAGE_MASK (1 << EE_PWR_SEL_FAULT_AUX_OVERVOLTAGE_BIT)
 
+#define EE_PD_STATUS_FAULT_BITSET_AUX_FAULT_MASK (1 << EE_PD_STATUS_FAULT_BITSET_AUX_FAULT_BIT)
+
+#define EE_PD_STATUS_FAULT_BITSET_DCDC_FAULT_MASK (1 << EE_PD_STATUS_FAULT_BITSET_DCDC_FAULT_BIT)
+
 // BMS SIGNALS
 typedef enum EEBatteryHeartbeatFaultSource {
   EE_BPS_FAULT_SOURCE_KILLSWITCH = 0,

diff --git a/projects/power_distribution/inc/pd_fault.h b/projects/power_distribution/inc/pd_fault.h
@@ -0,0 +1,9 @@
+#pragma once
+
+#include "status.h"
+
+/*
+ * @brief Checks for PD fault states and updates fault bitset CAN message
+ * @return STATUS_CODE_OK on success or appropriate error code
+ */
+StatusCode check_pd_fault(void);
diff --git a/projects/power_distribution/inc/pin_defs.h b/projects/power_distribution/inc/pin_defs.h
@@ -151,3 +151,16 @@
 #define MUX_SEL_INFOTAINMENT_DISPLAY_BMS 13  // aka main display
 #define MUX_SEL_FAN_1_2 14
 #define MUX_SEL_UV_VBAT 15
+
+// Fault pin addresses
+// GPIO
+#define AUX_FAULT_GPIO_1 \
+  { .port = GPIO_PORT_B, .pin = 3 }
+#define AUX_FAULT_GPIO_2 \
+  { .port = GPIO_PORT_B, .pin = 4 }
+#define DCDC_FAULT_GPIO_1 \
+  { .port = GPIO_PORT_A, .pin = 15 }
+#define DCDC_FAULT_GPIO_2 \
+  { .port = GPIO_PORT_B, .pin = 5 }
+#define DCDC_FAULT_GPIO_3 \
+  { .port = GPIO_PORT_A, .pin = 6 }
diff --git a/projects/power_distribution/src/main.c b/projects/power_distribution/src/main.c
@@ -44,6 +44,8 @@ void run_medium_cycle() {
   fsm_run_cycle(lights);
   wait_tasks(1);
 
+  adc_run();
+
   run_can_tx_cycle();
   wait_tasks(1);
 }

diff --git a/projects/power_distribution/src/pd_fault.c b/projects/power_distribution/src/pd_fault.c
@@ -0,0 +1,60 @@
+#include "pd_fault.h"
+
+#include "adc.h"
+#include "exported_enums.h"
+#include "gpio.h"
+#include "pin_defs.h"
+#include "power_distribution_setters.h"
+
+static uint8_t s_fault_bitset = 0;
+
+// Fault pin address definitions
+static const GpioAddress aux_fault_gpio_1 = AUX_FAULT_GPIO_1;
+static const GpioAddress aux_fault_gpio_2 = AUX_FAULT_GPIO_2;
+static const GpioAddress dcdc_fault_gpio_1 = DCDC_FAULT_GPIO_1;
+static const GpioAddress dcdc_fault_gpio_2 = DCDC_FAULT_GPIO_2;
+static const GpioAddress dcdc_fault_gpio_3 = DCDC_FAULT_GPIO_3;
+
+static void prv_set_fault_bit(uint8_t mask, bool condition) {
+  if (condition) {
+    s_fault_bitset |= mask;
+  } else {
+    s_fault_bitset &= ~(mask);
+  }
+}
+
+static StatusCode prv_check_aux_fault(void) {
+  GpioState aux_gpio_1_state;
+  GpioState aux_gpio_2_state;
+  status_ok_or_return(gpio_get_state(&aux_fault_gpio_1, &aux_gpio_1_state));
+  status_ok_or_return(gpio_get_state(&aux_fault_gpio_2, &aux_gpio_2_state));
+
+  bool aux_fault = (aux_gpio_1_state == GPIO_STATE_LOW || aux_gpio_2_state == GPIO_STATE_LOW);
+  prv_set_fault_bit(EE_PD_STATUS_FAULT_BITSET_AUX_FAULT_MASK, aux_fault);
+
+  return STATUS_CODE_OK;
+}
+
+static StatusCode prv_check_dcdc_fault(void) {
+  GpioState dcdc_gpio_1_state;
+  GpioState dcdc_gpio_2_state;
+  GpioState dcdc_gpio_3_state;
+  status_ok_or_return(gpio_get_state(&dcdc_fault_gpio_1, &dcdc_gpio_1_state));
+  status_ok_or_return(gpio_get_state(&dcdc_fault_gpio_2, &dcdc_gpio_2_state));
+  status_ok_or_return(gpio_get_state(&dcdc_fault_gpio_3, &dcdc_gpio_3_state));
+
+  bool dcdc_fault = (dcdc_gpio_1_state == GPIO_STATE_LOW || dcdc_gpio_2_state == GPIO_STATE_LOW ||
+                     dcdc_gpio_3_state == GPIO_STATE_HIGH);
+  prv_set_fault_bit(EE_PD_STATUS_FAULT_BITSET_DCDC_FAULT_MASK, dcdc_fault);
+
+  return STATUS_CODE_OK;
+}
+
+StatusCode check_pd_fault() {
+  status_ok_or_return(prv_check_aux_fault());
+  status_ok_or_return(prv_check_dcdc_fault());
+
+  set_pd_status_fault_bitset(s_fault_bitset);
+
+  return STATUS_CODE_OK;
+}