Add documentation page indicating existence of prefetchers

ucb-bar · Jun 8, 2023 · 9ce31b8 · 9ce31b8
1 parent 1013275
commit 9ce31b8
Show file tree

Hide file tree

Showing 2 changed files with 10 additions and 0 deletions.
diff --git a/docs/Generators/Prefetchers.rst b/docs/Generators/Prefetchers.rst
@@ -0,0 +1,9 @@
+Prefetchers
+====================================
+
+The BAR-fetchers libraryis a collection of Chisel-implemented prefetchers, designed for compatibility with Chipyard and Rocketchip SoCs.
+This package implements a generic prefetcher API, and example implementations of NextLine, Strided, and AMPM prefetchers.
+
+Prefetchers can be instantiated in front of a L1D HellaCache, or as TileLink nodes in front of some TileLink bus.
+
+An example configuration using prefetchers is found in the ``PrefetchingRocketConfig``
diff --git a/docs/Generators/index.rst b/docs/Generators/index.rst
@@ -34,3 +34,4 @@ so changes to the generators themselves will automatically be used when building
    NVDLA
    Sodor
    Mempress
+   Prefetchers
-Original file line number
+Diff line change
@@ Expand Up @@
        NVDLA
        Sodor
        Mempress
+       Prefetchers