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[TIR] Introduce BufferLoad/Store (apache#5205)
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Co-authored-by: Siyuan Feng <hzfengsy@sjtu.edu.cn>

This PR introduces BufferLoad/Store to TIR. The new nodes will replace
Provide and Call with Tensor arguments in the subsequent refactors.
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tqchen authored and Trevor Morris committed Apr 16, 2020
1 parent 9c18a53 commit 02d17c3
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Showing 15 changed files with 590 additions and 326 deletions.
14 changes: 8 additions & 6 deletions include/tvm/tir/buffer.h
Original file line number Diff line number Diff line change
Expand Up @@ -25,9 +25,8 @@
#define TVM_TIR_BUFFER_H_

#include <tvm/node/container.h>
#include <tvm/tir/expr.h>
#include <tvm/tir/op.h>

#include <tvm/ir/expr.h>
#include <tvm/tir/var.h>
#include <string>


Expand All @@ -36,6 +35,9 @@ namespace tir {
// Internal node container Buffer
class BufferNode;

// forward declare Stmt
class Stmt;

/*! \brief buffer type */
enum BufferType : int {
kDefault = 1,
Expand Down Expand Up @@ -75,9 +77,9 @@ class Buffer : public ObjectRef {
* \param offset The offset of ptr.
*/
TVM_DLL PrimExpr access_ptr(int access_mask,
DataType ptr_type = DataType::Handle(),
int content_lanes = 1,
PrimExpr offset = make_const(DataType::Int(32), 0)) const;
DataType ptr_type = DataType::Handle(),
int content_lanes = 1,
PrimExpr offset = IntImm(DataType::Int(32), 0)) const;
/*!
* \brief Create an Expr that does a vector load at begin index.
* \param begin The beginning index
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