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spiOverJtag: added Xilinx Spartan6 model: 25T package: CSG324 (xc6slx…
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…25tcsg324)
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trabucayre committed Aug 3, 2024
1 parent 1d2b18a commit bdaba6e
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Showing 4 changed files with 15 additions and 1 deletion.
2 changes: 1 addition & 1 deletion spiOverJtag/Makefile
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@@ -1,7 +1,7 @@
XILINX_PARTS := xc3s500evq100 \
xc6slx9tqg144 xc6slx9csg324 \
xc6slx16ftg256 xc6slx16csg324 xc6slx45csg324 xc6slx100fgg484 \
xc6slx45tfgg484 xc6slx150tfgg484 xc6slx150tcsg484 \
xc6slx25tcsg324 xc6slx45tfgg484 xc6slx150tfgg484 xc6slx150tcsg484 \
xc6vlx130tff784 \
xc7a15tcpg236 \
xc7a25tcpg238 xc7a25tcsg325 \
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3 changes: 3 additions & 0 deletions spiOverJtag/build.py
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Expand Up @@ -76,6 +76,7 @@
"xc6slx9csg324" : "xc6s_csg324",
"xc6slx16ftg256" : "xc6s_ftg256",
"xc6slx16csg324" : "xc6s_csg324",
"xc6slx25tcsg324" : "xc6s_t_csg324",
"xc6slx45csg324" : "xc6s_csg324",
"xc6slx45tfgg484" : "xc6s_t_fgg484",
"xc6slx100fgg484" : "xc6s_fgg484",
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"xc6slx9csg324": "xc6slx9",
"xc6slx16ftg256": "xc6slx16",
"xc6slx16csg324": "xc6slx16",
"xc6slx25tcsg324": "xc6slx25t",
"xc6slx45csg324": "xc6slx45",
"xc6slx45tfgg484": "xc6slx45t",
"xc6slx100fgg484": "xc6slx100",
Expand All @@ -140,6 +142,7 @@
"xc6slx9csg324": "csg324",
"xc6slx16ftg256": "ftg256",
"xc6slx16csg324": "csg324",
"xc6slx25tcsg324": "csg324",
"xc6slx45csg324": "csg324",
"xc6slx45tfgg484": "fgg484",
"xc6slx100fgg484": "fgg484",
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11 changes: 11 additions & 0 deletions spiOverJtag/constr_xc6s_t_csg324.ucf
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CONFIG VCCAUX = "2.5";

NET "sdi_dq0" LOC = T13 | IOSTANDARD = LVCMOS25;
NET "sdo_dq1" LOC = R13 | IOSTANDARD = LVCMOS25;
NET "wpn_dq2" LOC = T14 | IOSTANDARD = LVCMOS25;
NET "hldn_dq3" LOC = V14 | IOSTANDARD = LVCMOS25;
NET "csn" LOC = V3 | IOSTANDARD = LVCMOS25;
NET "sck" LOC = R15 | IOSTANDARD = LVCMOS25;

NET "sck" TNM_NET = "PRDsck";
TIMESPEC "TSsck" = PERIOD "PRDsck" 6 ns HIGH 50%;
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