We were required to design a "fully differential OpAmp" with some analysis, including open-loop gain ones and closed-loop ones in common-mode and differential-mode. Moreover, we simulated it with DC sweep, AC response, response with step, in order to obtain the waveform and check whether our design achieved the specification.

This frequency divider is able to divide the clock signal depending on 3-bit input signal. Also, we were required to draw block diagrams to represent the structure, use “laker” to layout, use another software to simulate the different after doing layout, and analyze delay and power consumption.