Minimal implementation of a time-sharing kernel on RISC-V, implemented in Zig, on top of OpenSBI

Trivial RISC-V Linux binary bootloader

A RISCV32IMAC Emulator

my progress and contribution yocto project in tessolve

Action that automatically builds the latest VisionFive 2 firmware (OpenSBI + U-Boot), for personal use.

MatteOS: The educational OS for RISC-V

Example of how to write a baremetal Rust program for RV64 which is booted by OpenSBI.

Low-level I/O systems: OpenSBI, bare-metal C, Linux drivers.

Wrapper to build Sifive Unmatched opensbi, u-boot, kernel with tiny initramfs

xv6-signal-handling: POSIX-style signal implementation for xv6 kernel - SUSTech project of CS302: Operating Systems in Spring 2025 - Score: 100/100