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open-core

Here are 5 public repositories matching this topic...

racerxdl / riskow

Learning how to make a RISC-V

fpga verilog learning-exercise risc-v open-core opencore riskow

Updated May 9, 2021
Verilog

Elphel / eddr3

mirror of https://git.elphel.com/Elphel/eddr3

fpga zynq ddr verilog xilinx open-core ddr3 memory-controller

Updated Oct 16, 2017
Verilog

Elphel / x393

mirror of https://git.elphel.com/Elphel/x393

fpga camera verilog xilinx machine-vision imaging open-core nc393

Updated Mar 16, 2023
Verilog

Elphel / x393_sata

mirror of https://git.elphel.com/Elphel/x393_sata

verilog sata-controller open-core

Updated May 12, 2020
Verilog

Elphel / x359

mirror of https://git.elphel.com/Elphel/x359

fpga verilog xilinx multiplexer spartan-3e-family open-core

Updated Nov 29, 2017
Verilog

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