🏗 💾 | Computer Architecture Course CEIT@AUT
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Updated
Oct 27, 2021 - VHDL
🏗 💾 | Computer Architecture Course CEIT@AUT
A VHDL implementation of the Morris Mano Basic Computer, including all key components such as registers, memory, ALU, control unit, and a common bus, designed for educational purposes. Fully modular and ready for simulation.
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