#

gate-array

Here are 2 public repositories matching this topic...

furrtek / SiliconRE

Traces, schematics, and general infos about custom chips reverse-engineered from silicon

asic fpga arcade-game video-game reverse-engineering arcade verilog chip konami hdl silicon cpld repro taito decap gate-array standard-cell

Updated Oct 28, 2024
Verilog

furrtek / ASICRE

Logic cell info for gate array and standard cell ASIC reverse-engineering

asic electronics reverse-engineering chip silicon gate-array standard-cell

Updated Jul 2, 2020

Improve this page

Add a description, image, and links to the gate-array topic page so that developers can more easily learn about it.

Curate this topic

Add this topic to your repo

To associate your repository with the gate-array topic, visit your repo's landing page and select "manage topics."