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Add ADC Channel parameter to the ADC API #555

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Add ADC Channel parameter to the ADC API #555

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23c8356
Adc 1
nikkoxp Jul 30, 2024
c66575b
Update apis/peripherals/adc/src/lib.rs
nikkoxp Jul 30, 2024
6486e57
Update apis/peripherals/adc/src/lib.rs
nikkoxp Jul 30, 2024
4888f53
updated code
nikkoxp Jul 30, 2024
6e4199e
updated code
nikkoxp Jul 30, 2024
918b863
updated version
nikkoxp Jul 31, 2024
944d56d
updated
nikkoxp Jul 31, 2024
6c30e2d
updated version with tests
nikkoxp Jul 31, 2024
151728b
updated tests and mod.rs
nikkoxp Aug 2, 2024
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44 changes: 34 additions & 10 deletions apis/peripherals/adc/src/lib.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -22,10 +22,22 @@ impl<S: Syscalls> Adc<S> {
.to_result::<u32, ErrorCode>()
.and(Ok(()))
}
//Returns the number of channels
pub fn get_number_of_channels() -> Result<usize, ErrorCode> {
S::command(DRIVER_NUM, EXISTS, 0, 0)
.to_result::<u32, ErrorCode>()
.and_then(|number_channels| number_channels.try_into().map_err(|_| ErrorCode::Fail))
}

// Initiate a sample reading
pub fn read_single_sample() -> Result<(), ErrorCode> {
S::command(DRIVER_NUM, SINGLE_SAMPLE, 0, 0).to_result()
pub fn read_single_sample(channel: usize) -> Result<(), ErrorCode> {
S::command(
DRIVER_NUM,
SINGLE_SAMPLE,
(channel as usize).try_into().unwrap(),
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Suggested change
(channel as usize).try_into().unwrap(),
channel as u32,

I would avoid the panic as most probably usize will be 32 bits.

@jrvanwhy I would like your input on this.

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Without looking at the entire CL: it looks like read_single_sample should take channel as a u32.

One question to ask that helps decide usize versus u32 is "in the unit test environment, which runs on 64-bit platforms, should this number get larger?" I don't think a unit test environment should support more channels than the real hardware, so this should be a u32. usize makes sense for memory addresses and offsets, but not necessarily for other hardware addresses.

0,
)
.to_result()
}

// Register a listener to be called when the ADC conversion is finished
Expand All @@ -43,14 +55,14 @@ impl<S: Syscalls> Adc<S> {

/// Initiates a synchronous ADC conversion
/// Returns the converted ADC value or an error
pub fn read_single_sample_sync() -> Result<u16, ErrorCode> {
pub fn read_single_sample_sync(channel: usize) -> Result<u16, ErrorCode> {
let sample: Cell<Option<u16>> = Cell::new(None);
let listener = ADCListener(|adc_val| {
sample.set(Some(adc_val));
});
share::scope(|subscribe| {
Self::register_listener(&listener, subscribe)?;
Self::read_single_sample()?;
Self::read_single_sample(channel)?;
while sample.get().is_none() {
S::yield_wait();
}
Expand All @@ -63,21 +75,33 @@ impl<S: Syscalls> Adc<S> {
}

/// Returns the number of ADC resolution bits
pub fn get_resolution_bits() -> Result<u32, ErrorCode> {
S::command(DRIVER_NUM, GET_RES_BITS, 0, 0).to_result()
pub fn get_resolution_bits(channel: usize) -> Result<u32, ErrorCode> {
S::command(
DRIVER_NUM,
GET_RES_BITS,
(channel as usize).try_into().unwrap(),
0,
)
.to_result()
}

/// Returns the reference voltage in millivolts (mV)
pub fn get_reference_voltage_mv() -> Result<u32, ErrorCode> {
S::command(DRIVER_NUM, GET_VOLTAGE_REF, 0, 0).to_result()
pub fn get_reference_voltage_mv(channel: usize) -> Result<u32, ErrorCode> {
S::command(
DRIVER_NUM,
GET_VOLTAGE_REF,
(channel as usize).try_into().unwrap(),
0,
)
.to_result()
}
}

pub struct ADCListener<F: Fn(u16)>(pub F);

impl<F: Fn(u16)> Upcall<OneId<DRIVER_NUM, 0>> for ADCListener<F> {
fn upcall(&self, adc_val: u32, _arg1: u32, _arg2: u32) {
self.0(adc_val as u16)
fn upcall(&self, _adc_mode: u32, _channel: u32, sample: u32) {
self.0(sample as u16)
}
}

Expand Down
28 changes: 17 additions & 11 deletions apis/peripherals/adc/src/tests.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -25,11 +25,13 @@ fn read_single_sample() {
let driver = fake::Adc::new();
kernel.add_driver(&driver);

assert_eq!(Adc::read_single_sample(), Ok(()));
let ch = Adc::get_number_of_channels().unwrap();

assert_eq!(Adc::read_single_sample(ch), Ok(()));
assert!(driver.is_busy());

assert_eq!(Adc::read_single_sample(), Err(ErrorCode::Busy));
assert_eq!(Adc::read_single_sample_sync(), Err(ErrorCode::Busy));
assert_eq!(Adc::read_single_sample(ch), Err(ErrorCode::Busy));
assert_eq!(Adc::read_single_sample_sync(ch), Err(ErrorCode::Busy));
}

#[test]
Expand All @@ -43,19 +45,21 @@ fn register_unregister_listener() {
sample.set(Some(adc_val));
});
share::scope(|subscribe| {
assert_eq!(Adc::read_single_sample(), Ok(()));
driver.set_value(100);
let ch = Adc::get_number_of_channels().unwrap();

assert_eq!(Adc::read_single_sample(ch), Ok(()));
driver.set_value(ch.try_into().unwrap(), 100);
assert_eq!(fake::Syscalls::yield_no_wait(), YieldNoWaitReturn::NoUpcall);

assert_eq!(Adc::register_listener(&listener, subscribe), Ok(()));
assert_eq!(Adc::read_single_sample(), Ok(()));
driver.set_value(100);
assert_eq!(Adc::read_single_sample(ch), Ok(()));
driver.set_value(ch.try_into().unwrap(), 100);
assert_eq!(fake::Syscalls::yield_no_wait(), YieldNoWaitReturn::Upcall);
assert_eq!(sample.get(), Some(100));

Adc::unregister_listener();
assert_eq!(Adc::read_single_sample(), Ok(()));
driver.set_value(100);
assert_eq!(Adc::read_single_sample(ch), Ok(()));
driver.set_value(ch.try_into().unwrap(), 100);
assert_eq!(fake::Syscalls::yield_no_wait(), YieldNoWaitReturn::NoUpcall);
});
}
Expand All @@ -66,6 +70,8 @@ fn read_single_sample_sync() {
let driver = fake::Adc::new();
kernel.add_driver(&driver);

driver.set_value_sync(1000);
assert_eq!(Adc::read_single_sample_sync(), Ok(1000));
let ch = Adc::get_number_of_channels().unwrap();

driver.set_value_sync(ch.try_into().unwrap(), 1000);
assert_eq!(Adc::read_single_sample_sync(ch), Ok(1000));
}
2 changes: 1 addition & 1 deletion build_scripts/src/lib.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -11,7 +11,7 @@ const PLATFORMS: &[(&str, &str, &str, &str, &str)] = &[
("hifive1" , "0x20040000", "32M" , "0x80003000", "0x01000"),
("imix" , "0x00040000", "0x0040000", "0x20008000", "62K" ),
("imxrt1050" , "0x63002000", "0x1000000", "0x20004000", "112K" ),
("microbit_v2" , "0x00040000", "256K" , "0x20004000", "112K" ),
("microbit_v2" , "0x00040000", "256K" , "0x20006000", "112K" ),
("msp432" , "0x00020000", "0x0020000", "0x20004000", "0x02000"),
("nano_rp2040_connect", "0x10020000", "256K" , "0x20004000", "248K" ),
("nrf52" , "0x00030000", "0x0060000", "0x20004000", "62K" ),
Expand Down
18 changes: 12 additions & 6 deletions examples/adc.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -19,13 +19,19 @@ fn main() {
writeln!(Console::writer(), "adc driver unavailable").unwrap();
return;
}

//getting the number of channels
let Ok(number_channels) = Adc::get_number_of_channels() else {
writeln!(Console::writer(), "can't get number of channels").unwrap();
return;
};
loop {
match Adc::read_single_sample_sync() {
Ok(adc_val) => writeln!(Console::writer(), "Sample: {}\n", adc_val).unwrap(),
Err(_) => writeln!(Console::writer(), "error while reading sample",).unwrap(),
}
for i in 0..number_channels {
match Adc::read_single_sample_sync(i as usize) {
Ok(adc_val) => writeln!(Console::writer(), "Sample: {}\n", adc_val).unwrap(),
Err(_) => writeln!(Console::writer(), "error while reading sample",).unwrap(),
}

Alarm::sleep_for(Milliseconds(2000)).unwrap();
Alarm::sleep_for(Milliseconds(2000)).unwrap();
}
}
}
22 changes: 14 additions & 8 deletions unittest/src/fake/adc/mod.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -13,32 +13,34 @@ use std::cell::Cell;
// because it was impossible to schedule an upcall during the `synchronous` read in other ways.
pub struct Adc {
busy: Cell<bool>,
upcall_on_command: Cell<Option<i32>>,
upcall_on_command: [Cell<Option<i32>>; 3],
share_ref: DriverShareRef,
}

impl Adc {
pub fn new() -> std::rc::Rc<Adc> {
std::rc::Rc::new(Adc {
busy: Cell::new(false),
upcall_on_command: Cell::new(None),
upcall_on_command: [Cell::new(None), Cell::new(None), Cell::new(None)],
share_ref: Default::default(),
})
}

pub fn is_busy(&self) -> bool {
self.busy.get()
}
pub fn set_value(&self, value: i32) {
pub fn set_value(&self, channel: i32, sample: i32) {
if self.busy.get() {
self.share_ref
.schedule_upcall(0, (value as u32, 0, 0))
.schedule_upcall(0, (0, channel as u32, sample as u32))
.expect("Unable to schedule upcall");
self.busy.set(false);
}
}
pub fn set_value_sync(&self, value: i32) {
self.upcall_on_command.set(Some(value));
pub fn set_value_sync(&self, channel: i32, sample: i32) {
self.upcall_on_command[0].set(Some(0));
self.upcall_on_command[1].set(Some(channel));
self.upcall_on_command[2].set(Some(sample));
}
}

Expand All @@ -60,8 +62,12 @@ impl crate::fake::SyscallDriver for Adc {
return crate::command_return::failure(ErrorCode::Busy);
}
self.busy.set(true);
if let Some(val) = self.upcall_on_command.take() {
self.set_value(val);
if let (Some(0), Some(channel), Some(sample)) = (
self.upcall_on_command[0].take(),
self.upcall_on_command[1].take(),
self.upcall_on_command[2].take(),
) {
self.set_value(channel, sample);
}
crate::command_return::success()
}
Expand Down
17 changes: 8 additions & 9 deletions unittest/src/fake/adc/tests.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -16,11 +16,11 @@ fn command() {
Some(ErrorCode::Busy)
);

adc.set_value(100);
adc.set_value(0, 100);
assert!(adc.command(SINGLE_SAMPLE, 0, 1).is_success());
adc.set_value(100);
adc.set_value(0, 100);

adc.set_value_sync(100);
adc.set_value_sync(0, 100);
assert!(adc.command(SINGLE_SAMPLE, 0, 1).is_success());
assert!(adc.command(SINGLE_SAMPLE, 0, 1).is_success());
}
Expand All @@ -39,7 +39,7 @@ fn kernel_integration() {
fake::Syscalls::command(DRIVER_NUM, SINGLE_SAMPLE, 0, 0).get_failure(),
Some(ErrorCode::Busy)
);
adc.set_value(100);
adc.set_value(0, 100);
assert!(fake::Syscalls::command(DRIVER_NUM, SINGLE_SAMPLE, 0, 1).is_success());

let listener = Cell::<Option<(u32,)>>::new(None);
Expand All @@ -48,19 +48,18 @@ fn kernel_integration() {
fake::Syscalls::subscribe::<_, _, DefaultConfig, DRIVER_NUM, 0>(subscribe, &listener),
Ok(())
);

adc.set_value(100);
adc.set_value(0, 100);
assert_eq!(fake::Syscalls::yield_no_wait(), YieldNoWaitReturn::Upcall);
assert_eq!(listener.get(), Some((100,)));

adc.set_value(200);
adc.set_value(0, 200);
assert_eq!(fake::Syscalls::yield_no_wait(), YieldNoWaitReturn::NoUpcall);

assert!(fake::Syscalls::command(DRIVER_NUM, SINGLE_SAMPLE, 0, 1).is_success());
adc.set_value(200);
adc.set_value(0, 200);
assert_eq!(fake::Syscalls::yield_no_wait(), YieldNoWaitReturn::Upcall);

adc.set_value_sync(200);
adc.set_value_sync(0, 200);
assert!(fake::Syscalls::command(DRIVER_NUM, SINGLE_SAMPLE, 0, 1).is_success());
assert_eq!(fake::Syscalls::yield_no_wait(), YieldNoWaitReturn::Upcall);
});
Expand Down