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"Hacker" Tomu FPGA (Fomu) v0.0 support #34

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merged 30 commits into from
Jul 6, 2019
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osresearch
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USB ACM serial enumeration success

Successfully flashed the Fomu v0.0 "Hacker" board (ice40up5k-uwg30) with this build (using fomu-flash) and was able to upload a user program with tinyprog -p.

arachne-pnr doesn't produce a working bitsream for me and nextpnr-ice40 seems very unstable as to whether or not things will work. The /dev/ttyACM0 enumeration and programming works with the seed 12345678, even though icetime reports that it is only 19.69 MHz.

osresearch and others added 27 commits January 13, 2019 16:34
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
icecube doesn't care about init values, but yosys does and you can't
satisfy them with HW RAM module.

So here we remove all the init values and we make sure the reads are
not dependent on the reset line

Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
…atches

If you don't assign all 'reg's in a process, this effectively describes
a latch, and the HW doesn't have any HW latches which leads yosys to create
a logic loop, which is definitely not good in FPGA !

Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
icecube doesn't care about init values, but yosys does and you can't
satisfy them with HW RAM module.

So here we remove all the init values and we make sure the reads are
not dependent on the reset line

Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
…atches

If you don't assign all 'reg's in a process, this effectively describes
a latch, and the HW doesn't have any HW latches which leads yosys to create
a logic loop, which is definitely not good in FPGA !

Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
@mithro
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mithro commented Jan 18, 2019

Hey @osresearch
Are you on IRC at all? If so you should join us on the #tomu and #timvideos IRC channels.
FYI I'm currently working on a replacement (migen + softcpu) bootloader for the Fomu at https://github.com/mithro/valentyusb/tree/master/valentyusb (actually right at this very moment :-)
The aim is to support multiple different protocols like DFU and UF2 protocols and probably even TinyProg / HID base system in the future...

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mithro commented Jan 26, 2019

@osresearch - I've merged a bunch of the dependent pull requests.

I think it would be a good idea to merge #40 and this pull request in the next couple of days. Could you update me on what you think the state is?

@mithro mithro changed the title Tomu Fomu FPGA v0.0 support "Hacker" Tomu FPGA (Fomu) v0.0 support Apr 10, 2019
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mithro commented Apr 26, 2019

@osresearch - I would love to merge this support. Are you going to have any time to clean it up or should I try and find time to do it?

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This needs to be re-tested with a more recent checkout, although I don't have my programming jig handy. I can test with the existing bootloader and write into the user application space, which will hopefully be sufficient to validate.

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I've merged this with master and it seems to work fine on my one Fomu to test with. The 48 MHz clock "passes" timing at 38 MHz, which is unchanged from before.

@mithro mithro merged commit 704c8fc into tinyfpga:master Jul 6, 2019
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3 participants