Add riscv64 support (#14)

Signed-off-by: Felix Yan <felixonmars@archlinux.org>
tikv · Sep 17, 2021 · 52de425 · 52de425
1 parent 2d242ee
commit 52de425
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diff --git a/benches/roundtrip.rs b/benches/roundtrip.rs
@@ -32,6 +32,7 @@ const MIN_ALIGN: usize = 8;
     target_arch = "powerpc64",
     target_arch = "powerpc64le",
     target_arch = "mips64",
+    target_arch = "riscv64",
     target_arch = "s390x",
     target_arch = "sparc64"
 )))]

diff --git a/jemalloc-sys/build.rs b/jemalloc-sys/build.rs
@@ -309,6 +309,11 @@ fn main() {
     } else if !target.contains("windows") {
         println!("cargo:rustc-link-lib=pthread");
     }
+    // GCC may generate a __atomic_exchange_1 library call which requires -latomic
+    // during the final linking. https://github.com/riscv-collab/riscv-gcc/issues/12
+    if target.contains("riscv") {
+        println!("cargo:rustc-link-lib=atomic");
+    }
     println!("cargo:rerun-if-changed=jemalloc");
 }
 

diff --git a/src/lib.rs b/src/lib.rs
@@ -54,6 +54,7 @@ const ALIGNOF_MAX_ALIGN_T: usize = 8;
     target_arch = "powerpc64",
     target_arch = "powerpc64le",
     target_arch = "mips64",
+    target_arch = "riscv64",
     target_arch = "s390x",
     target_arch = "sparc64"
 )))]