ASoC: SOF: Intel: hda-stream: Always use at least two BDLE for transfers

The HDA specification states that the SDnLVI (Last Valid Index) must be at
least 1 (two BDLE entry).
While the LVI=0 worked so far without issues, it is better to align with
the specification to avoid unforeseen issues with FW loading.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com>

sound/soc/sof/intel/hda-stream.c

@@ -120,8 +120,14 @@ int hda_dsp_stream_setup_bdl(struct snd_sof_dev *sdev,
 
 	period_bytes = hstream->period_bytes;
 	dev_dbg(sdev->dev, "period_bytes:0x%x\n", period_bytes);
+	/*
+	 * HDA spec demands at least two 'periods' for the DMA to work correctly
+	 * Note: period_bytes == 0 can only happen for firmware or library
+	 * loading, the binary sizes have the necessary alignment requirements
+	 * met
+	 */
 	if (!period_bytes)
-		period_bytes = hstream->bufsize;
+		period_bytes = hstream->bufsize / 2;
 
 	periods = hstream->bufsize / period_bytes;