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  • Sebsky Development
  • Brussels, Belgium

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7 contributions in the last year

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Contribution activity

March 2025

Created 1 repository

Created a pull request in open-logic/open-logic that received 1 comment

Prevent TMR insertion in CDC blocks

+16 −1 lines changed 1 comment

Created an issue in open-logic/open-logic that received 4 comments

Disable TMR insertion for CDC

Hello, I'm working on a FPGA that will require Triple modular redundancy inserted during synthesis. I'm planning to add the syn_radhardlevel attrib…

4 comments
Opened 1 other issue in 1 repository
open-logic/open-logic 1 closed
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