Quick fix for ISO endpoints

src/bus.rs

@@ -678,6 +678,19 @@ impl<USB: UsbPeripheral> usb_device::bus::UsbBus for UsbBus<USB> {
                         }
                     }
 
+                    if status == 0x02 {
+                        if let Some(ep) = &self.allocator.endpoints_out[epnum as usize] {
+                            // toggle (micro)frame number odd/even bit for ISO transactions if interval is 1
+                            if ep.descriptor().ep_type == EndpointType::Isochronous && ep.descriptor().interval == 1 {
+                                let ep = regs.endpoint_out(epnum as usize);
+                                let odd = read_reg!(endpoint_out, ep, DOEPCTL, EONUM_DPID);
+                                modify_reg!(endpoint_out, ep, DOEPCTL,
+                                    SD0PID_SEVNFRM: odd as u32,
+                                    SODDFRM: !odd as u32);
+                            }
+                        }
+                    }
+
                     if status == 0x02 || status == 0x06 {
                         if let Some(ep) = &self.allocator.endpoints_out[epnum as usize] {
                             let mut buffer = ep.buffer.borrow(cs).borrow_mut();

src/endpoint.rs

@@ -1,5 +1,5 @@
 use usb_device::{Result, UsbError, UsbDirection};
-use usb_device::endpoint::EndpointAddress;
+use usb_device::endpoint::{EndpointAddress, EndpointType};
 use crate::endpoint_memory::{EndpointBuffer, EndpointBufferState};
 use crate::ral::{read_reg, write_reg, modify_reg, endpoint_in, endpoint_out, endpoint0_out};
 use crate::target::{fifo_write, UsbRegisters};
@@ -60,6 +60,10 @@ impl Endpoint {
     fn index(&self) -> u8 {
         self.descriptor.address.index() as u8
     }
+
+    pub fn descriptor(&self) -> &EndpointDescriptor {
+        &self.descriptor
+    }
 }
 
 
@@ -142,7 +146,22 @@ impl EndpointIn {
         #[cfg(feature = "hs")]
         write_reg!(endpoint_in, ep, DIEPTSIZ, MCNT: 1, PKTCNT: 1, XFRSIZ: buf.len() as u32);
 
-        modify_reg!(endpoint_in, ep, DIEPCTL, CNAK: 1, EPENA: 1);
+        // toggle (micro)frame number odd/even bit for ISO transactions if interval is 1
+        if self.descriptor.ep_type == EndpointType::Isochronous && self.descriptor.interval == 1 {
+            let odd = read_reg!(endpoint_in, ep, DIEPCTL, EONUM_DPID);
+            #[cfg(feature = "fs")]
+            modify_reg!(
+                endpoint_in, ep, DIEPCTL,
+                CNAK: 1, EPENA: 1, SD0PID_SEVNFRM: odd as u32, SODDFRM_SD1PID: !odd as u32
+            );
+            #[cfg(feature = "hs")]
+            modify_reg!(
+                endpoint_in, ep, DIEPCTL,
+                CNAK: 1, EPENA: 1, SD0PID_SEVNFRM: odd as u32, SODDFRM: !odd as u32
+            );
+        } else {
+            modify_reg!(endpoint_in, ep, DIEPCTL, CNAK: 1, EPENA: 1);
+        }
 
         fifo_write(self.usb, self.index(), buf);