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Merge pull request #40 from stm32-rs/rustfmt
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Enforce rustfmt
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@Disasm
Disasm authored Nov 14, 2023
2 parents fed133d + ee50414 commit 4f1e219
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Showing 8 changed files with 153 additions and 117 deletions.
17 changes: 17 additions & 0 deletions .github/workflows/rustfmt.yml
View file
Original file line number Diff line number Diff line change
@@ -0,0 +1,17 @@
on:
push:
branches: [ staging, trying, master ]
pull_request:

name: Code formatting check

jobs:
fmt:
name: Rustfmt
runs-on: ubuntu-latest
steps:
- uses: actions/checkout@v4
- uses: dtolnay/rust-toolchain@stable
with:
components: rustfmt
- run: cargo fmt --all -- --check
110 changes: 71 additions & 39 deletions src/bus.rs
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Original file line number Diff line number Diff line change
@@ -1,16 +1,18 @@
use crate::ral::{
modify_reg, otg_device, otg_global, otg_global_dieptxfx, otg_pwrclk, read_reg, write_reg,
};
use crate::transition::{EndpointConfig, EndpointDescriptor};
use core::marker::PhantomData;
use embedded_hal::blocking::delay::DelayMs;
use usb_device::bus::{PollResult, UsbBusAllocator};
use usb_device::endpoint::{EndpointAddress, EndpointType};
use usb_device::{Result, UsbDirection, UsbError};
use usb_device::bus::{UsbBusAllocator, PollResult};
use usb_device::endpoint::{EndpointType, EndpointAddress};
use crate::transition::{EndpointConfig, EndpointDescriptor};
use crate::ral::{read_reg, write_reg, modify_reg, otg_global, otg_device, otg_pwrclk, otg_global_dieptxfx};

use crate::target::UsbRegisters;
use crate::target::interrupt::{self, Mutex, CriticalSection};
use crate::endpoint::{EndpointIn, EndpointOut};
use crate::endpoint_memory::{EndpointMemoryAllocator, EndpointBufferState};
use crate::{UsbPeripheral, PhyType};
use crate::endpoint_memory::{EndpointBufferState, EndpointMemoryAllocator};
use crate::target::interrupt::{self, CriticalSection, Mutex};
use crate::target::UsbRegisters;
use crate::{PhyType, UsbPeripheral};

/// USB peripheral driver for STM32 microcontrollers.
pub struct UsbBus<USB> {
Expand Down Expand Up @@ -90,7 +92,8 @@ impl<USB: UsbPeripheral> UsbBus<USB> {
for ep in &self.allocator.endpoints_in {
if let Some(ep) = ep {
// enabling EP TX interrupt
modify_reg!(otg_device, regs.device(), DAINTMSK, |v| v | (0x0001 << ep.address().index()));
modify_reg!(otg_device, regs.device(), DAINTMSK, |v| v
| (0x0001 << ep.address().index()));

ep.configure(cs);
}
Expand Down Expand Up @@ -249,7 +252,7 @@ impl<USB: UsbPeripheral> EndpointAllocator<USB> {
endpoints_in: [None, None, None, None, None, None, None, None, None],
endpoints_out: [None, None, None, None, None, None, None, None, None],
memory_allocator: EndpointMemoryAllocator::new(memory),
_marker: PhantomData
_marker: PhantomData,
}
}

Expand All @@ -269,28 +272,33 @@ impl<USB: UsbPeripheral> EndpointAllocator<USB> {
for number in 1..USB::ENDPOINT_COUNT {
if *bitmap & (1 << number) == 0 {
*bitmap |= 1 << number;
return Ok(number as u8)
return Ok(number as u8);
}
}
Err(UsbError::EndpointOverflow)
}
}

fn alloc(bitmap: &mut u8, config: &EndpointConfig, direction: UsbDirection) -> Result<EndpointDescriptor> {
fn alloc(
bitmap: &mut u8,
config: &EndpointConfig,
direction: UsbDirection,
) -> Result<EndpointDescriptor> {
let number = Self::alloc_number(bitmap, config.number)?;
let address = EndpointAddress::from_parts(number as usize, direction);
Ok(EndpointDescriptor {
address,
ep_type: config.ep_type,
max_packet_size: config.max_packet_size,
interval: config.interval
interval: config.interval,
})
}

fn alloc_in(&mut self, config: &EndpointConfig) -> Result<EndpointIn> {
let descr = Self::alloc(&mut self.bitmap_in, config, UsbDirection::In)?;

self.memory_allocator.allocate_tx_buffer(descr.address.index() as u8, descr.max_packet_size as usize)?;
self.memory_allocator
.allocate_tx_buffer(descr.address.index() as u8, descr.max_packet_size as usize)?;
let ep = EndpointIn::new::<USB>(descr);

Ok(ep)
Expand All @@ -299,7 +307,9 @@ impl<USB: UsbPeripheral> EndpointAllocator<USB> {
fn alloc_out(&mut self, config: &EndpointConfig) -> Result<EndpointOut> {
let descr = Self::alloc(&mut self.bitmap_out, config, UsbDirection::Out)?;

let buffer = self.memory_allocator.allocate_rx_buffer(descr.max_packet_size as usize)?;
let buffer = self
.memory_allocator
.allocate_rx_buffer(descr.max_packet_size as usize)?;
let ep = EndpointOut::new::<USB>(descr, buffer);

Ok(ep)
Expand All @@ -311,8 +321,8 @@ impl<USB: UsbPeripheral> EndpointAllocator<USB> {
ep_addr: Option<EndpointAddress>,
ep_type: EndpointType,
max_packet_size: u16,
interval: u8) -> Result<EndpointAddress>
{
interval: u8,
) -> Result<EndpointAddress> {
let ep_type = unsafe { core::mem::transmute(ep_type) };
let number = ep_addr.map(|a| a.index() as u8);

Expand All @@ -321,21 +331,21 @@ impl<USB: UsbPeripheral> EndpointAllocator<USB> {
max_packet_size,
interval,
number,
pair_of: None
pair_of: None,
};
match ep_dir {
UsbDirection::Out => {
let ep = self.alloc_out(&config)?;
let address = ep.address();
self.endpoints_out[address.index()] = Some(ep);
Ok(address)
},
}
UsbDirection::In => {
let ep = self.alloc_in(&config)?;
let address = ep.address();
self.endpoints_in[address.index()] = Some(ep);
Ok(address)
},
}
}
}
}
Expand All @@ -347,9 +357,10 @@ impl<USB: UsbPeripheral> usb_device::bus::UsbBus for UsbBus<USB> {
ep_addr: Option<EndpointAddress>,
ep_type: EndpointType,
max_packet_size: u16,
interval: u8) -> Result<EndpointAddress>
{
self.allocator.alloc_ep(ep_dir, ep_addr, ep_type, max_packet_size, interval)
interval: u8,
) -> Result<EndpointAddress> {
self.allocator
.alloc_ep(ep_dir, ep_addr, ep_type, max_packet_size, interval)
}

fn enable(&mut self) {
Expand Down Expand Up @@ -383,7 +394,7 @@ impl<USB: UsbPeripheral> usb_device::bus::UsbBus for UsbBus<USB> {
PhyType::InternalFullSpeed => {
// Select FS Embedded PHY
modify_reg!(otg_global, regs.global(), GUSBCFG, PHYSEL: 1);
},
}
PhyType::InternalHighSpeed => {
// Turn off PHY
modify_reg!(otg_global, regs.global(), GCCFG, PWRDWN: 0);
Expand Down Expand Up @@ -578,8 +589,16 @@ impl<USB: UsbPeripheral> usb_device::bus::UsbBus for UsbBus<USB> {

let core_id = read_reg!(otg_global, regs.global(), CID);

let (wakeup, suspend, enum_done, reset, iep, rxflvl) = read_reg!(otg_global, regs.global(), GINTSTS,
WKUPINT, USBSUSP, ENUMDNE, USBRST, IEPINT, RXFLVL
let (wakeup, suspend, enum_done, reset, iep, rxflvl) = read_reg!(
otg_global,
regs.global(),
GINTSTS,
WKUPINT,
USBSUSP,
ENUMDNE,
USBRST,
IEPINT,
RXFLVL
);

if reset != 0 {
Expand Down Expand Up @@ -628,7 +647,7 @@ impl<USB: UsbPeripheral> usb_device::bus::UsbBus for UsbBus<USB> {
32_000_000..=u32::MAX => 0x6,
};
}
_ => unimplemented!()
_ => unimplemented!(),
}
modify_reg!(otg_global, regs.global(), GUSBCFG, TRDT: trdt);

Expand All @@ -651,12 +670,15 @@ impl<USB: UsbPeripheral> usb_device::bus::UsbBus for UsbBus<USB> {

// RXFLVL & IEPINT flags are read-only, there is no need to clear them
if rxflvl != 0 {
let (epnum, data_size, status) = read_reg!(otg_global, regs.global(), GRXSTSR, EPNUM, BCNT, PKTSTS);
let (epnum, data_size, status) =
read_reg!(otg_global, regs.global(), GRXSTSR, EPNUM, BCNT, PKTSTS);
match status {
0x02 => { // OUT received
0x02 => {
// OUT received
ep_out |= 1 << epnum;
}
0x06 => { // SETUP received
0x06 => {
// SETUP received
// flushing TX if something stuck in control endpoint
let ep = regs.endpoint_in(epnum as usize);
if read_reg!(endpoint_in, ep, DIEPTSIZ, PKTCNT) != 0 {
Expand All @@ -665,7 +687,8 @@ impl<USB: UsbPeripheral> usb_device::bus::UsbBus for UsbBus<USB> {
}
ep_setup |= 1 << epnum;
}
0x03 | 0x04 => { // OUT completed | SETUP completed
0x03 | 0x04 => {
// OUT completed | SETUP completed
// Re-enable the endpoint, F429-like chips only
if core_id == 0x0000_1200 || core_id == 0x0000_1100 {
let ep = regs.endpoint_out(epnum as usize);
Expand All @@ -685,12 +708,17 @@ impl<USB: UsbPeripheral> usb_device::bus::UsbBus for UsbBus<USB> {
read_reg!(otg_global, regs.global(), GRXSTSP); // pop GRXSTSP

let is_setup = status == 0x06;
buffer.fill_from_fifo(*regs, data_size as u16, is_setup).ok();
buffer
.fill_from_fifo(*regs, data_size as u16, is_setup)
.ok();

// Re-enable the endpoint, F446-like chips only
if core_id == 0x0000_2000 || core_id == 0x0000_2100 ||
core_id == 0x0000_2300 ||
core_id == 0x0000_3000 || core_id == 0x0000_3100 {
if core_id == 0x0000_2000
|| core_id == 0x0000_2100
|| core_id == 0x0000_2300
|| core_id == 0x0000_3000
|| core_id == 0x0000_3100
{
let ep = regs.endpoint_out(epnum as usize);
modify_reg!(endpoint_out, ep, DOEPCTL, CNAK: 1, EPENA: 1);
}
Expand All @@ -716,17 +744,21 @@ impl<USB: UsbPeripheral> usb_device::bus::UsbBus for UsbBus<USB> {
match ep.buffer_state() {
EndpointBufferState::DataOut => {
ep_out |= 1 << ep.address().index();
},
}
EndpointBufferState::DataSetup => {
ep_setup |= 1 << ep.address().index();
},
EndpointBufferState::Empty => {},
}
EndpointBufferState::Empty => {}
}
}
}

if (ep_in_complete | ep_out | ep_setup) != 0 {
PollResult::Data { ep_out, ep_in_complete, ep_setup }
PollResult::Data {
ep_out,
ep_in_complete,
ep_setup,
}
} else {
PollResult::None
}
Expand Down
53 changes: 24 additions & 29 deletions src/endpoint.rs
View file
Original file line number Diff line number Diff line change
@@ -1,25 +1,23 @@
use usb_device::{Result, UsbError, UsbDirection};
use usb_device::endpoint::EndpointAddress;
use crate::endpoint_memory::{EndpointBuffer, EndpointBufferState};
use crate::ral::{read_reg, write_reg, modify_reg, endpoint_in, endpoint_out, endpoint0_out};
use crate::target::{fifo_write, UsbRegisters};
use crate::ral::{endpoint0_out, endpoint_in, endpoint_out, modify_reg, read_reg, write_reg};
use crate::target::interrupt::{self, CriticalSection, Mutex};
use core::ops::{Deref, DerefMut};
use core::cell::RefCell;
use crate::target::{fifo_write, UsbRegisters};
use crate::transition::EndpointDescriptor;
use crate::UsbPeripheral;
use core::cell::RefCell;
use core::ops::{Deref, DerefMut};
use usb_device::endpoint::EndpointAddress;
use usb_device::{Result, UsbDirection, UsbError};

pub fn set_stalled(usb: UsbRegisters, address: EndpointAddress, stalled: bool) {
interrupt::free(|_| {
match address.direction() {
UsbDirection::Out => {
let ep = usb.endpoint_out(address.index() as usize);
modify_reg!(endpoint_out, ep, DOEPCTL, STALL: stalled as u32);
},
UsbDirection::In => {
let ep = usb.endpoint_in(address.index() as usize);
modify_reg!(endpoint_in, ep, DIEPCTL, STALL: stalled as u32);
},
interrupt::free(|_| match address.direction() {
UsbDirection::Out => {
let ep = usb.endpoint_out(address.index() as usize);
modify_reg!(endpoint_out, ep, DOEPCTL, STALL: stalled as u32);
}
UsbDirection::In => {
let ep = usb.endpoint_in(address.index() as usize);
modify_reg!(endpoint_in, ep, DIEPCTL, STALL: stalled as u32);
}
})
}
Expand All @@ -29,11 +27,11 @@ pub fn is_stalled(usb: UsbRegisters, address: EndpointAddress) -> bool {
UsbDirection::Out => {
let ep = usb.endpoint_out(address.index());
read_reg!(endpoint_out, ep, DOEPCTL, STALL)
},
}
UsbDirection::In => {
let ep = usb.endpoint_in(address.index());
read_reg!(endpoint_in, ep, DIEPCTL, STALL)
},
}
};
stall != 0
}
Expand All @@ -48,7 +46,7 @@ impl Endpoint {
pub fn new<USB: UsbPeripheral>(descriptor: EndpointDescriptor) -> Endpoint {
Endpoint {
descriptor,
usb: UsbRegisters::new::<USB>()
usb: UsbRegisters::new::<USB>(),
}
}

Expand All @@ -62,7 +60,6 @@ impl Endpoint {
}
}


pub struct EndpointIn {
common: Endpoint,
}
Expand Down Expand Up @@ -121,7 +118,7 @@ impl EndpointIn {

pub fn write(&self, buf: &[u8]) -> Result<()> {
let ep = self.usb.endpoint_in(self.index() as usize);
if self.index() != 0 && read_reg!(endpoint_in, ep, DIEPCTL, EPENA) != 0{
if self.index() != 0 && read_reg!(endpoint_in, ep, DIEPCTL, EPENA) != 0 {
return Err(UsbError::WouldBlock);
}

Expand Down Expand Up @@ -156,7 +153,10 @@ pub struct EndpointOut {
}

impl EndpointOut {
pub fn new<USB: UsbPeripheral>(descriptor: EndpointDescriptor, buffer: EndpointBuffer) -> EndpointOut {
pub fn new<USB: UsbPeripheral>(
descriptor: EndpointDescriptor,
buffer: EndpointBuffer,
) -> EndpointOut {
EndpointOut {
common: Endpoint::new::<USB>(descriptor),
buffer: Mutex::new(RefCell::new(buffer)),
Expand Down Expand Up @@ -205,19 +205,14 @@ impl EndpointOut {
}

pub fn read(&self, buf: &mut [u8]) -> Result<usize> {
interrupt::free(|cs| {
self.buffer.borrow(cs).borrow_mut().read_packet(buf)
})
interrupt::free(|cs| self.buffer.borrow(cs).borrow_mut().read_packet(buf))
}

pub fn buffer_state(&self) -> EndpointBufferState {
interrupt::free(|cs| {
self.buffer.borrow(cs).borrow().state()
})
interrupt::free(|cs| self.buffer.borrow(cs).borrow().state())
}
}


impl Deref for EndpointIn {
type Target = Endpoint;

Expand Down
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