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Highlight required features for some modules
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And additional documentation improvments
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Sh3Rm4n committed Apr 29, 2021
1 parent 7b8f542 commit 10c4e9f
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Showing 7 changed files with 20 additions and 21 deletions.
1 change: 0 additions & 1 deletion Cargo.toml
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Expand Up @@ -70,7 +70,6 @@ default = ["unproven"]
unproven = ["embedded-hal/unproven"]
device-selected = []
direct-call-deprecated = []
direct-call-deprecated = []
ld = []
rt = ["stm32f3/rt"]
can = ["embedded-hal-can"]
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4 changes: 2 additions & 2 deletions src/adc.rs
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@@ -1,8 +1,8 @@
//! API for the ADC (Analog to Digital Converter)
//! Analog to Digital Converter. (Requires feature `stm32f303x[bcde]`)
//!
//! # Examples
//!
//! Check out [examles/adc.rs].
//! Check out [examles/adc.rs][].
//!
//! It can be built for the STM32F3Discovery running
//! `cargo build --example adc --features=stm32f303xc`
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16 changes: 9 additions & 7 deletions src/can.rs
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@@ -1,4 +1,4 @@
//! Controller Area Network
//! Controller Area Network (Requires feature `can`)
//!
//! CAN is currently not enabled by default, and
//! can be enabled by the `can` feature.
Expand All @@ -25,8 +25,10 @@ pub use pac::can::btr::LBKM_A;
const EXID_MASK: u32 = 0b1_1111_1111_1100_0000_0000_0000_0000;
const MAX_EXTENDED_ID: u32 = 0x1FFF_FFFF;

/// Options the CAN bus. This is primarily used to set bus timings, but also controls options like enabling loopback or silent mode for debugging.
/// See http://www.bittiming.can-wiki.info/#bxCAN for generating the timing parameters for different baud rates and clocks.
/// Options for the CAN bus.
///
/// This is primarily used to set bus timings, but also controls options like enabling loopback or silent mode for debugging.
/// See <http://www.bittiming.can-wiki.info/#bxCAN> for generating the timing parameters for different baud rates and clocks.
///
/// Use `CanOpts::default()` to get 250kbps at 32mhz system clock
pub struct CanOpts {
Expand All @@ -43,25 +45,25 @@ impl CanOpts {
CanOpts::default()
}

/// Set the Baud Rate Prescaler. See http://www.bittiming.can-wiki.info/#bxCAN for generating the timing parameters for different baud rates and clocks.
/// Set the Baud Rate Prescaler. See <http://www.bittiming.can-wiki.info/#bxCAN> for generating the timing parameters for different baud rates and clocks.
pub fn brp(mut self, brp: u16) -> Self {
self.brp = brp;
self
}

/// Set the Resynchronisation Jump Width. See http://www.bittiming.can-wiki.info/#bxCAN for generating the timing parameters for different baud rates and clocks.
/// Set the Resynchronisation Jump Width. See <http://www.bittiming.can-wiki.info/#bxCAN> for generating the timing parameters for different baud rates and clocks.
pub fn sjw(mut self, sjw: u8) -> Self {
self.sjw = sjw;
self
}

/// Set Time Segment One. See http://www.bittiming.can-wiki.info/#bxCAN for generating the timing parameters for different baud rates and clocks.
/// Set Time Segment One. See <http://www.bittiming.can-wiki.info/#bxCAN> for generating the timing parameters for different baud rates and clocks.
pub fn ts1(mut self, ts1: u8) -> Self {
self.ts1 = ts1;
self
}

/// Set Time Segment Two. See http://www.bittiming.can-wiki.info/#bxCAN for generating the timing parameters for different baud rates and clocks.
/// Set Time Segment Two. See <http://www.bittiming.can-wiki.info/#bxCAN> for generating the timing parameters for different baud rates and clocks.
pub fn ts2(mut self, ts2: u8) -> Self {
self.ts2 = ts2;
self
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4 changes: 2 additions & 2 deletions src/dma.rs
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@@ -1,6 +1,6 @@
//! Direct memory access (DMA) controller
//! Direct memory access (DMA) controller. (Requires feature `stm32f303*` or `stm32f302*`)
//!
//! Currently DMA is only supported for STM32F303 MCUs.
//! Currently DMA is only supported for STM32F303 or STM32F302 MCUs.
//!
//! An example how to use DMA for serial, can be found at [examples/serial_dma.rs]
//!
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10 changes: 5 additions & 5 deletions src/lib.rs
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Expand Up @@ -47,25 +47,25 @@
[README]: https://github.com/stm32-rs/stm32f3xx-hal/blob/master/README.md#selecting-the-right-chip
### ld
### `ld`
When this feature is enabled the `memory.x` linker script for target chip is automatically
provided by this crate. See [`cortex-m-rt` document][memoryx] for more info.
[memoryx]: https://docs.rs/cortex-m-rt/0.6.13/cortex_m_rt/#memoryx
### rt
### `rt`
This feature enables [`stm32f3`][]'s `rt` feature. See [`cortex-m-rt` document][device] for more info.
[`stm32f3`]: https://crates.io/crates/stm32f3
[device]: https://docs.rs/cortex-m-rt/0.6.13/cortex_m_rt/#device
### can
### `can`
Enable CAN peripherals on supported targets.
### stm32-usbd
### `stm32-usbd`
Enable USB peripherals on supported targets.
Expand Down Expand Up @@ -120,7 +120,7 @@ pub use stm32f3::stm32f373 as pac;
#[cfg(feature = "svd-f3x4")]
pub use stm32f3::stm32f3x4 as pac;

/// Enable use of interrupt macro
/// Enable use of interrupt macro. (Requires feature `rt`)
#[cfg(feature = "rt")]
pub use crate::pac::interrupt;

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2 changes: 1 addition & 1 deletion src/spi.rs
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Expand Up @@ -9,10 +9,10 @@ use core::ptr;
use crate::hal::spi::FullDuplex;
pub use crate::hal::spi::{Mode, Phase, Polarity};
use crate::pac::{
spi1,
spi1::cr2::{DS_A, FRXTH_A},
SPI1, SPI2, SPI3,
};
use crate::stm32::spi1;

#[cfg(any(
feature = "stm32f302xd",
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4 changes: 1 addition & 3 deletions src/usb.rs
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@@ -1,6 +1,4 @@
//! USB peripheral
//!
//! Requires the `stm32-usbd` feature and one of the `stm32f303x*` features.
//! USB peripheral. (Requires feature `stm32-usbd`)
//!
//! See [examples/usb_serial.rs] for a usage example.
//!
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