Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Jump to bottom

[YANG] Enhance the port yang model with new port fields: adv_speeds, interface_type and adv_interface_types #6948

Merged
merged 11 commits into from
May 20, 2021
Merged

[YANG] Enhance the port yang model with new port fields: adv_speeds, interface_type and adv_interface_types #6948

Show file tree
Hide file tree
Changes from 5 commits
Commits
Show all changes
11 commits
Select commit Hold shift + click to select a range
8542063
Add yang model for port auto-neg feature
Junchao-Mellanox Feb 8, 2021
a643311
Add unit test
Junchao-Mellanox Feb 10, 2021
a590759
Add new field to sample config db
Junchao-Mellanox Feb 10, 2021
d7b2129
Optimize yang model definition for port auto negotiation attributes
Junchao-Mellanox Mar 4, 2021
3396cc7
Change autoneg value pattern to on|off
Junchao-Mellanox Mar 5, 2021
0e4157a
Merge branch 'master' into port-auto-neg-yang-model
Junchao-Mellanox Mar 12, 2021
efae6d9
Add description for each new field
Junchao-Mellanox Mar 17, 2021
501f5f1
Merge branch 'master' into port-auto-neg-yang-model
Junchao-Mellanox Apr 2, 2021
2489804
Add description for new fields and adjust unit test
Junchao-Mellanox Apr 2, 2021
3806c7e
Merge branch 'port-auto-neg-yang-model' of github.com:Junchao-Mellano…
Junchao-Mellanox Apr 2, 2021
f4399a5
Fix review comment
Junchao-Mellanox Apr 15, 2021
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
4 changes: 4 additions & 0 deletions src/sonic-yang-models/tests/yang_model_tests/test_yang_model.py
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -181,6 +181,10 @@ def initTest(self):
'desc': 'LOAD PORT TABLE FEC PATTERN FAILURE',
'eStr': self.defaultYANGFailure['Pattern'] + ['rc']
},
'PORT_INVALID_AUTONEG_TEST': {
'desc': 'LOAD PORT TABLE AUTONEG PATTERN FAILURE.',
'eStr': self.defaultYANGFailure['Pattern'] + ['invalid'],
},
'CRM_WITH_WRONG_PERCENTAGE': {
'desc': 'CRM_WITH_WRONG_PERCENTAGE must condition failure.',
'eStr': self.defaultYANGFailure['Must']
Expand Down
28 changes: 27 additions & 1 deletion src/sonic-yang-models/tests/yang_model_tests/yangTest.json
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -632,7 +632,11 @@
"fec": "rs",
"mtu": 9000,
"admin_status": "up",
"pfc_asym": "on"
"pfc_asym": "on",
"autoneg": "on",
"adv_speeds": ["10000","25000"],
"adv_interface_types": ["all"],
"interface_type": "CR"
}]
}
}
Expand All @@ -656,6 +660,28 @@
}
},

"PORT_INVALID_AUTONEG_TEST": {
"sonic-port:sonic-port": {
"sonic-port:PORT": {
"PORT_LIST": [{
"port_name": "Ethernet8",
"alias": "eth8",
"lanes": "65",
"description": "Ethernet8",
"speed": 25000,
"fec": "rs",
"mtu": 9000,
"admin_status": "up",
"pfc_asym": "on",
"autoneg": "invalid",
"adv_speeds": "10000,25000",
"adv_interface_types": "CR,CR2",
"interface_type": "CR"
}]
}
}
},

"ACL_RULE_ARP_TYPE_ICMPV6_CODE_MISMATCH": {
"sonic-acl:sonic-acl": {
"sonic-acl:ACL_RULE": {
Expand Down
30 changes: 30 additions & 0 deletions src/sonic-yang-models/yang-models/sonic-port.yang
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -67,6 +67,36 @@ module sonic-port{
}
}

leaf autoneg {
type string {
pattern "on|off";
}
}
Junchao-Mellanox marked this conversation as resolved.
Show resolved Hide resolved

leaf-list adv_speeds {
type union {
type uint32 {
range 1..400000;
Copy link
Collaborator

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

So there is no other constraint on adv speed?, it can take any number of values. Kindly point to the correct paragraph in HLD for this plz, I will have a look. Thx

Copy link
Collaborator Author

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Yes, there is no other constraint for adv_speeds, I am following the field "speed" in the same yang model file. HLD: https://github.com/Junchao-Mellanox/SONiC/blob/port-auto-neg/doc/port_auto_neg/port-auto-negotiation-design.md#config-advertised-speeds

Junchao-Mellanox marked this conversation as resolved.
Show resolved Hide resolved
}
type string {
pattern "all";
}
}
Junchao-Mellanox marked this conversation as resolved.
Show resolved Hide resolved
}

leaf interface_type {
type stypes:interface_type;
}
Junchao-Mellanox marked this conversation as resolved.
Show resolved Hide resolved

leaf-list adv_interface_types {
type union {
type stypes:interface_type;
Junchao-Mellanox marked this conversation as resolved.
Show resolved Hide resolved
type string {
pattern "all";
}
Junchao-Mellanox marked this conversation as resolved.
Show resolved Hide resolved
}
}

leaf mtu {
type uint16 {
range 1..9216;
Expand Down
24 changes: 24 additions & 0 deletions src/sonic-yang-models/yang-models/sonic-types.yang
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -107,4 +107,28 @@ module sonic-types {
pattern "percentage|used|free|PERCENTAGE|USED|FREE";
}
}

typedef interface_type {
lguohan marked this conversation as resolved.
Show resolved Hide resolved
type enumeration {
enum CR;
enum CR2;
enum CR4;
enum SR;
enum SR2;
enum SR4;
enum LR;
enum LR4;
enum KR;
enum KR4;
enum CAUI;
enum GMII;
enum SFI;
enum XLAUI;
enum KR2;
enum CAUI4;
enum XAUI;
enum XFI;
enum XGMII;
}
}
}