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Split yang tests into multiple files #6939

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merged 11 commits into from
Mar 31, 2021
Merged

Split yang tests into multiple files #6939

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acce8db
Add manageability to the yang model tests by splitting the tests
joyas-joseph Mar 2, 2021
9e15665
Merge branch 'master' of github.com:Azure/sonic-buildimage into yang_…
joyas-joseph Mar 4, 2021
30850c8
Update tests in sonic-yang-mgmt based on changes in sonig-yang-models
joyas-joseph Mar 4, 2021
543db9f
Merge branch 'master' of github.com:Azure/sonic-buildimage into yang_…
joyas-joseph Mar 10, 2021
39d4449
Update with latest test_sonic_yang.py
joyas-joseph Mar 10, 2021
dff550b
Address review comments.
joyas-joseph Mar 11, 2021
c5c37e6
Merge from azure/master
joyas-joseph Mar 16, 2021
d60b020
Update tests based on latest master
joyas-joseph Mar 16, 2021
c5934f6
Merge branch 'master' of github.com:Azure/sonic-buildimage into yang_…
joyas-joseph Mar 29, 2021
b6b7770
Merge branch 'master' of github.com:Azure/sonic-buildimage into yang_…
joyas-joseph Mar 30, 2021
444d929
Resolve conflicts
joyas-joseph Mar 30, 2021
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2 changes: 2 additions & 0 deletions .azure-pipelines/run-test-template.yml
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Expand Up @@ -49,6 +49,8 @@ steps:
virsh -c qemu:///system dumpxml ${{ parameters.dut }} > $(Build.ArtifactStagingDirectory)/kvmdump/${{ parameters.dut }}.xml
img=$(virsh -c qemu:///system domblklist ${{ parameters.dut }} | grep vda | awk '{print $2}')
cp $img $(Build.ArtifactStagingDirectory)/kvmdump/${{ parameters.dut }}.img
gzip $(Build.ArtifactStagingDirectory)/kvmdump/${{ parameters.dut }}.img
sudo gzip $(Build.ArtifactStagingDirectory)/kvmdump/${{ parameters.dut }}.memdmp
virsh -c qemu:///system undefine ${{ parameters.dut }}
fi

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3 changes: 3 additions & 0 deletions device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-C64/buffers.json.j2
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@@ -0,0 +1,3 @@
{%- set default_topo = 't1' %}
{%- include 'buffers_config.j2' %}

46 changes: 46 additions & 0 deletions device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-C64/buffers_defaults_t0.j2
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@@ -0,0 +1,46 @@
{%- set default_cable = '5m' %}
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@praveen-li praveen-li Mar 30, 2021 •
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Hi Joyesh, We need rebase here. Seems something got messed up here, these files should not be in this diff. I remember I approve this PR, but kindly fix this last comment and I'll approve again, thanks a lot.....I
on Double check, I think It is right rebase. I am not sure, why one commit shows the extra delta.


{%- macro generate_port_lists(PORT_ALL) %}
{# Generate list of ports #}
{%- for port_idx in range(0,64) %}
{%- if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{%- endif %}
{%- endfor %}
{%- endmacro %}

{%- macro generate_buffer_pool_and_profiles() %}
"BUFFER_POOL": {
"ingress_lossless_pool": {
"size": "33329088",
"type": "ingress",
"mode": "dynamic",
"xoff": "7827456"
},
"egress_lossy_pool": {
"size": "26663272",
"type": "egress",
"mode": "dynamic"
},
"egress_lossless_pool": {
"size": "42349632",
"type": "egress",
"mode": "static"
}
},
"BUFFER_PROFILE": {
"ingress_lossy_profile": {
"pool":"[BUFFER_POOL|ingress_lossless_pool]",
"size":"0",
"static_th":"44302336"
},
"egress_lossless_profile": {
"pool":"[BUFFER_POOL|egress_lossless_pool]",
"size":"0",
"static_th":"42349632"
},
"egress_lossy_profile": {
"pool":"[BUFFER_POOL|egress_lossy_pool]",
"size":"1664",
"dynamic_th":"-1"
}
},
{%- endmacro %}
46 changes: 46 additions & 0 deletions device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-C64/buffers_defaults_t1.j2
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{%- set default_cable = '300m' %}

{%- macro generate_port_lists(PORT_ALL) %}
{# Generate list of ports #}
{%- for port_idx in range(0,64) %}
{%- if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{%- endif %}
{%- endfor %}
{%- endmacro %}

{%- macro generate_buffer_pool_and_profiles() %}
"BUFFER_POOL": {
"ingress_lossless_pool": {
"size": "33329088",
"type": "ingress",
"mode": "dynamic",
"xoff": "7827456"
},
"egress_lossy_pool": {
"size": "26663272",
"type": "egress",
"mode": "dynamic"
},
"egress_lossless_pool": {
"size": "42349632",
"type": "egress",
"mode": "static"
}
},
"BUFFER_PROFILE": {
"ingress_lossy_profile": {
"pool":"[BUFFER_POOL|ingress_lossless_pool]",
"size":"0",
"static_th":"44302336"
},
"egress_lossless_profile": {
"pool":"[BUFFER_POOL|egress_lossless_pool]",
"size":"0",
"static_th":"42349632"
},
"egress_lossy_profile": {
"pool":"[BUFFER_POOL|egress_lossy_pool]",
"size":"1664",
"dynamic_th":"-1"
}
},
{%- endmacro %}
8 changes: 8 additions & 0 deletions device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-C64/pg_profile_lookup.ini
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# PG lossless profiles.
# speed cable size xon xoff threshold xon_offset
50000 5m 1248 1248 56160 -3 2496
100000 5m 1248 1248 96928 -3 2496
50000 40m 1248 1248 96096 -3 2496
100000 40m 1248 1248 177632 -3 2496
50000 300m 1248 1248 141856 -3 2496
100000 300m 1248 1248 268736 -3 2496
1 change: 1 addition & 0 deletions device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-C64/qos.json.j2
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{%- include 'qos_config.j2' %}
2 changes: 0 additions & 2 deletions device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-C64/sai.profile
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This file was deleted.

14 changes: 14 additions & 0 deletions device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-C64/sai.profile.j2
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@@ -0,0 +1,14 @@
{# Get sai.profile based on switch_role #}
{%- if DEVICE_METADATA is defined -%}
{%- set switch_role = DEVICE_METADATA['localhost']['type'] -%}
{%- if 'torrouter' in switch_role.lower() or 'torswitch' in switch_role.lower() %}
{% set sai_profile_contents = 'SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th2-a7260cx3-64-64x100G-t0.config.bcm' -%}
{%- else %}
{% set sai_profile_contents = 'SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th2-a7260cx3-64-64x100G-t1.config.bcm' -%}
{%- endif %}
{%- else %}
{% set sai_profile_contents = 'SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th2-a7260cx3-64-64x100G-t1.config.bcm' -%}
{%- endif %}
{# Write the contents of sai_ profile_filename to sai.profile file #}
{{ sai_profile_contents }}
SAI_NUM_ECMP_MEMBERS=64
2 changes: 2 additions & 0 deletions ...X3-C64/th2-a7260cx3-64-64x100G.config.bcm → ...C64/th2-a7260cx3-64-64x100G-t0.config.bcm
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Expand Up @@ -1011,3 +1011,5 @@ serdes_preemphasis_114=0x174507
serdes_preemphasis_115=0x184606
serdes_preemphasis_116=0x103706
serdes_preemphasis_117=0x133c06

mmu_init_config="MSFT-TH2-Tier0"
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