[device][accton] Add as5812-54t. (#3428)

* Verified as5812_54t platfrom, except SDK and monitor.
Signed-off-by: roy_lee <roy_lee@accton.com>

* Add as5812-54t to build its debian package.
Signed-off-by: roy_lee <roy_lee@accton.com>

* Use the right cpld read/write api.
Signed-off-by: roy_lee <roy_lee@accton.com>

* Update device paths.
Signed-off-by: roy_lee <roy_lee@accton.com>

* update psu driver, correct python lib location.
Signed-off-by: roy_lee <roy_lee@accton.com>

* Give a default return value.
Signed-off-by: roy_lee <roy_lee@accton.com>

device/accton/x86_64-accton_as5812_54t-r0/Accton-AS5812-54T/port_config.ini

@@ -0,0 +1,73 @@
+# name         lanes              alias         index  speed
+Ethernet0      13                 tenGigE0      1      10000
+Ethernet1      14                 tenGigE1      2      10000
+Ethernet2      15                 tenGigE2      3      10000
+Ethernet3      16                 tenGigE3      4      10000
+Ethernet4      21                 tenGigE4      5      10000
+Ethernet5      22                 tenGigE5      6      10000
+Ethernet6      23                 tenGigE6      7      10000
+Ethernet7      24                 tenGigE7      8      10000
+Ethernet8      25                 tenGigE8      9      10000
+Ethernet9      26                 tenGigE9      10     10000
+Ethernet10     27                 tenGigE10     11     10000
+Ethernet11     28                 tenGigE11     12     10000
+Ethernet12     29                 tenGigE12     13     10000
+Ethernet13     30                 tenGigE13     14     10000
+Ethernet14     31                 tenGigE14     15     10000
+Ethernet15     32                 tenGigE15     16     10000
+Ethernet16     45                 tenGigE16     17     10000
+Ethernet17     46                 tenGigE17     18     10000
+Ethernet18     47                 tenGigE18     19     10000
+Ethernet19     48                 tenGigE19     20     10000
+Ethernet20     49                 tenGigE20     21     10000
+Ethernet21     50                 tenGigE21     22     10000
+Ethernet22     51                 tenGigE22     23     10000
+Ethernet23     52                 tenGigE23     24     10000
+Ethernet24     53                 tenGigE24     25     10000
+Ethernet25     54                 tenGigE25     26     10000
+Ethernet26     55                 tenGigE26     27     10000
+Ethernet27     56                 tenGigE27     28     10000
+Ethernet28     57                 tenGigE28     29     10000
+Ethernet29     58                 tenGigE29     30     10000
+Ethernet30     59                 tenGigE30     31     10000
+Ethernet31     60                 tenGigE31     32     10000
+Ethernet32     61                 tenGigE32     33     10000
+Ethernet33     62                 tenGigE33     34     10000
+Ethernet34     63                 tenGigE34     35     10000
+Ethernet35     64                 tenGigE35     36     10000
+Ethernet36     65                 tenGigE36     37     10000
+Ethernet37     66                 tenGigE37     38     10000
+Ethernet38     67                 tenGigE38     39     10000
+Ethernet39     68                 tenGigE39     40     10000
+Ethernet40     69                 tenGigE40     41     10000
+Ethernet41     70                 tenGigE41     42     10000
+Ethernet42     71                 tenGigE42     43     10000
+Ethernet43     72                 tenGigE43     44     10000
+Ethernet44     73                 tenGigE44     45     10000
+Ethernet45     74                 tenGigE45     46     10000
+Ethernet46     75                 tenGigE46     47     10000
+Ethernet47     76                 tenGigE47     48     10000
+Ethernet48     97                 tenGigE48     49     10000
+Ethernet49     98                 tenGigE49     49     10000
+Ethernet50     99                 tenGigE50     49     10000
+Ethernet51     100                tenGigE51     49     10000
+Ethernet52     101                tenGigE52     50     10000
+Ethernet53     102                tenGigE53     50     10000
+Ethernet54     103                tenGigE54     50     10000
+Ethernet55     104                tenGigE55     50     10000
+Ethernet56     81                 tenGigE56     51     10000
+Ethernet57     82                 tenGigE57     51     10000
+Ethernet58     83                 tenGigE58     51     10000
+Ethernet59     84                 tenGigE59     51     10000
+Ethernet60     105                tenGigE60     52     10000
+Ethernet61     106                tenGigE61     52     10000
+Ethernet62     107                tenGigE62     52     10000
+Ethernet63     108                tenGigE63     52     10000
+Ethernet64     109                tenGigE64     53     10000
+Ethernet65     110                tenGigE65     53     10000
+Ethernet66     111                tenGigE66     53     10000
+Ethernet67     112                tenGigE67     53     10000
+Ethernet68     77                 tenGigE68     54     10000
+Ethernet69     78                 tenGigE69     54     10000
+Ethernet70     79                 tenGigE70     54     10000
+Ethernet71     80                 tenGigE71     54     10000

device/accton/x86_64-accton_as5812_54t-r0/Accton-AS5812-54T/sai.profile

@@ -0,0 +1 @@
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td2-as5812-72x10G.config.bcm

device/accton/x86_64-accton_as5812_54t-r0/Accton-AS5812-54T/td2-as5812-72x10G.config.bcm

@@ -0,0 +1,148 @@
+os=unix
+bcm_stat_flags=0
+parity_enable=0
+parity_correction=0
+
+bcm_num_cos=8
+l2_mem_entries=32768
+l3_mem_entries=16384
+l3_alpm_enable=2
+ipv6_lpm_128b_enable=1
+
+mmu_lossless=0
+lls_num_l2uc=12
+module_64ports=0
+
+#SFI
+serdes_if_type=9
+
+port_init_cl72=0
+phy_an_c73=5 # TSCMOD_CL73_CL37
+
+#sdk6.5.5 only supports 156(default) or 125
+#xgxs_lcpll_xtal_refclk=1
+tslam_dma_enable=1
+table_dma_enable=1
+
+#for 72 ports with 48 10G ports and 6 40G ports for breakout mode
+pbmp_oversubscribe=0x1fffffffffffffffffe
+pbmp_xport_xe=0x1fffffffffffffffffe
+
+rate_ext_mdio_divisor=96
+
+#SFP+ 1-4 from WC3
+portmap_1=13:10
+portmap_2=14:10
+portmap_3=15:10
+portmap_4=16:10
+
+#SFP+ 5-8 from WC5
+portmap_5=21:10
+portmap_6=22:10
+portmap_7=23:10
+portmap_8=24:10
+
+#SFP+ 9-12 from WC6
+portmap_9=25:10
+portmap_10=26:10
+portmap_11=27:10
+portmap_12=28:10
+
+#SFP+ 13-16 from WC7
+portmap_13=29:10
+portmap_14=30:10
+portmap_15=31:10
+portmap_16=32:10
+
+#SFP+ 17-20 from WC11
+portmap_17=45:10
+portmap_18=46:10
+portmap_19=47:10
+portmap_20=48:10
+
+#SFP+ 21-24 from WC12
+portmap_21=49:10
+portmap_22=50:10
+portmap_23=51:10
+portmap_24=52:10
+
+#SFP+ 25-28 from WC13
+portmap_25=53:10
+portmap_26=54:10
+portmap_27=55:10
+portmap_28=56:10
+
+#SFP+ 29-32 from WC14
+portmap_29=57:10
+portmap_30=58:10
+portmap_31=59:10
+portmap_32=60:10
+
+#SFP+ 33-36 from WC15
+portmap_33=61:10
+portmap_34=62:10
+portmap_35=63:10
+portmap_36=64:10
+
+#SFP+ 37-40 from WC16
+portmap_37=65:10
+portmap_38=66:10
+portmap_39=67:10
+portmap_40=68:10
+
+#SFP+ 41-44 from WC17
+portmap_41=69:10
+portmap_42=70:10
+portmap_43=71:10
+portmap_44=72:10
+
+#SFP+ 45-48 from WC18
+portmap_45=73:10
+portmap_46=74:10
+portmap_47=75:10
+portmap_48=76:10
+
+# QSFP+ 49/WC24/port 49
+portmap_49=97:10
+portmap_50=98:10
+portmap_51=99:10
+portmap_52=100:10
+
+# QSFP+ 51/WC25/port 50
+portmap_53=101:10
+portmap_54=102:10
+portmap_55=103:10
+portmap_56=104:10
+
+# QSFP+ 53/WC20/port 51
+portmap_57=81:10
+portmap_58=82:10
+portmap_59=83:10
+portmap_60=84:10
+
+# QSFP+ 50/WC26/port 52
+portmap_61=105:10
+portmap_62=106:10
+portmap_63=107:10
+portmap_64=108:10
+
+# QSFP+ 52/WC27/port 53
+portmap_65=109:10
+portmap_66=110:10
+portmap_67=111:10
+portmap_68=112:10
+
+# QSFP+ 54/WC19/port 54
+portmap_69=77:10
+portmap_70=78:10
+portmap_71=79:10
+portmap_72=80:10
+
+# L3 ECMP
+# - In Trident2, VP LAGs share the same table as ECMP group table.
+#   The first N entries are reserved for VP LAGs, where N is the value of the
+#   config property "max_vp_lags". By default this was set to 256
+l3_max_ecmp_mode=1
+max_vp_lags=0
+
+stable_size=0x2000000

device/accton/x86_64-accton_as5812_54t-r0/default_sku

@@ -0,0 +1 @@
+Accton-AS5812-54T t1

device/accton/x86_64-accton_as5812_54t-r0/installer.conf

@@ -0,0 +1,3 @@
+CONSOLE_PORT=0x2f8
+CONSOLE_DEV=1
+CONSOLE_SPEED=115200

device/accton/x86_64-accton_as5812_54t-r0/led_proc_init.soc

@@ -0,0 +1,162 @@
+# LED setting for active
+# -----------------------------------------------------------------------------
+# for as5812_54x (48xg+6qxg)
+#
+# on green - if link up
+# off      - if link down
+# blink    - if active
+# -----------------------------------------------------------------------------
+m CMIC_LEDUP0_PORT_ORDER_REMAP_60_63 REMAP_PORT_63=0
+m CMIC_LEDUP0_PORT_ORDER_REMAP_60_63 REMAP_PORT_62=1
+m CMIC_LEDUP0_PORT_ORDER_REMAP_60_63 REMAP_PORT_61=2
+m CMIC_LEDUP0_PORT_ORDER_REMAP_60_63 REMAP_PORT_60=3
+m CMIC_LEDUP0_PORT_ORDER_REMAP_56_59 REMAP_PORT_59=4
+m CMIC_LEDUP0_PORT_ORDER_REMAP_56_59 REMAP_PORT_58=5
+m CMIC_LEDUP0_PORT_ORDER_REMAP_56_59 REMAP_PORT_57=6
+m CMIC_LEDUP0_PORT_ORDER_REMAP_56_59 REMAP_PORT_56=7
+m CMIC_LEDUP0_PORT_ORDER_REMAP_52_55 REMAP_PORT_55=8
+m CMIC_LEDUP0_PORT_ORDER_REMAP_52_55 REMAP_PORT_54=9
+m CMIC_LEDUP0_PORT_ORDER_REMAP_52_55 REMAP_PORT_53=10
+m CMIC_LEDUP0_PORT_ORDER_REMAP_52_55 REMAP_PORT_52=11
+m CMIC_LEDUP0_PORT_ORDER_REMAP_48_51 REMAP_PORT_51=12
+m CMIC_LEDUP0_PORT_ORDER_REMAP_48_51 REMAP_PORT_50=13
+m CMIC_LEDUP0_PORT_ORDER_REMAP_48_51 REMAP_PORT_49=14
+m CMIC_LEDUP0_PORT_ORDER_REMAP_48_51 REMAP_PORT_48=15
+m CMIC_LEDUP0_PORT_ORDER_REMAP_32_35 REMAP_PORT_35=16
+m CMIC_LEDUP0_PORT_ORDER_REMAP_32_35 REMAP_PORT_34=17
+m CMIC_LEDUP0_PORT_ORDER_REMAP_32_35 REMAP_PORT_33=18
+m CMIC_LEDUP0_PORT_ORDER_REMAP_32_35 REMAP_PORT_32=19
+m CMIC_LEDUP0_PORT_ORDER_REMAP_36_39 REMAP_PORT_39=20
+m CMIC_LEDUP0_PORT_ORDER_REMAP_36_39 REMAP_PORT_38=21
+m CMIC_LEDUP0_PORT_ORDER_REMAP_36_39 REMAP_PORT_37=22
+m CMIC_LEDUP0_PORT_ORDER_REMAP_36_39 REMAP_PORT_36=23
+m CMIC_LEDUP0_PORT_ORDER_REMAP_40_43 REMAP_PORT_43=24
+m CMIC_LEDUP0_PORT_ORDER_REMAP_40_43 REMAP_PORT_42=25
+m CMIC_LEDUP0_PORT_ORDER_REMAP_40_43 REMAP_PORT_41=26
+m CMIC_LEDUP0_PORT_ORDER_REMAP_40_43 REMAP_PORT_40=27
+m CMIC_LEDUP0_PORT_ORDER_REMAP_44_47 REMAP_PORT_47=28
+m CMIC_LEDUP0_PORT_ORDER_REMAP_44_47 REMAP_PORT_46=29
+m CMIC_LEDUP0_PORT_ORDER_REMAP_44_47 REMAP_PORT_45=30
+m CMIC_LEDUP0_PORT_ORDER_REMAP_44_47 REMAP_PORT_44=31
+m CMIC_LEDUP0_PORT_ORDER_REMAP_28_31 REMAP_PORT_31=32
+m CMIC_LEDUP0_PORT_ORDER_REMAP_28_31 REMAP_PORT_30=33
+m CMIC_LEDUP0_PORT_ORDER_REMAP_28_31 REMAP_PORT_29=34
+m CMIC_LEDUP0_PORT_ORDER_REMAP_28_31 REMAP_PORT_28=35
+m CMIC_LEDUP0_PORT_ORDER_REMAP_24_27 REMAP_PORT_27=36
+m CMIC_LEDUP0_PORT_ORDER_REMAP_24_27 REMAP_PORT_26=37
+m CMIC_LEDUP0_PORT_ORDER_REMAP_24_27 REMAP_PORT_25=38
+m CMIC_LEDUP0_PORT_ORDER_REMAP_24_27 REMAP_PORT_24=39
+m CMIC_LEDUP0_PORT_ORDER_REMAP_20_23 REMAP_PORT_23=40
+m CMIC_LEDUP0_PORT_ORDER_REMAP_20_23 REMAP_PORT_22=41
+m CMIC_LEDUP0_PORT_ORDER_REMAP_20_23 REMAP_PORT_21=42
+m CMIC_LEDUP0_PORT_ORDER_REMAP_20_23 REMAP_PORT_20=43
+m CMIC_LEDUP0_PORT_ORDER_REMAP_16_19 REMAP_PORT_19=44
+m CMIC_LEDUP0_PORT_ORDER_REMAP_16_19 REMAP_PORT_18=45
+m CMIC_LEDUP0_PORT_ORDER_REMAP_16_19 REMAP_PORT_17=46
+m CMIC_LEDUP0_PORT_ORDER_REMAP_16_19 REMAP_PORT_16=47
+m CMIC_LEDUP0_PORT_ORDER_REMAP_0_3 REMAP_PORT_3=48
+m CMIC_LEDUP0_PORT_ORDER_REMAP_0_3 REMAP_PORT_2=49
+m CMIC_LEDUP0_PORT_ORDER_REMAP_0_3 REMAP_PORT_1=50
+m CMIC_LEDUP0_PORT_ORDER_REMAP_0_3 REMAP_PORT_0=51
+m CMIC_LEDUP0_PORT_ORDER_REMAP_4_7 REMAP_PORT_7=52
+m CMIC_LEDUP0_PORT_ORDER_REMAP_4_7 REMAP_PORT_6=53
+m CMIC_LEDUP0_PORT_ORDER_REMAP_4_7 REMAP_PORT_5=54
+m CMIC_LEDUP0_PORT_ORDER_REMAP_4_7 REMAP_PORT_4=55
+m CMIC_LEDUP0_PORT_ORDER_REMAP_8_11 REMAP_PORT_11=56
+m CMIC_LEDUP0_PORT_ORDER_REMAP_8_11 REMAP_PORT_10=57
+m CMIC_LEDUP0_PORT_ORDER_REMAP_8_11 REMAP_PORT_9=58
+m CMIC_LEDUP0_PORT_ORDER_REMAP_8_11 REMAP_PORT_8=59
+m CMIC_LEDUP0_PORT_ORDER_REMAP_12_15 REMAP_PORT_15=60
+m CMIC_LEDUP0_PORT_ORDER_REMAP_12_15 REMAP_PORT_14=61
+m CMIC_LEDUP0_PORT_ORDER_REMAP_12_15 REMAP_PORT_13=62
+m CMIC_LEDUP0_PORT_ORDER_REMAP_12_15 REMAP_PORT_12=63
+m CMIC_LEDUP1_PORT_ORDER_REMAP_60_63 REMAP_PORT_63=0
+m CMIC_LEDUP1_PORT_ORDER_REMAP_60_63 REMAP_PORT_62=1
+m CMIC_LEDUP1_PORT_ORDER_REMAP_60_63 REMAP_PORT_61=2
+m CMIC_LEDUP1_PORT_ORDER_REMAP_60_63 REMAP_PORT_60=3
+m CMIC_LEDUP1_PORT_ORDER_REMAP_56_59 REMAP_PORT_59=4
+m CMIC_LEDUP1_PORT_ORDER_REMAP_56_59 REMAP_PORT_58=5
+m CMIC_LEDUP1_PORT_ORDER_REMAP_56_59 REMAP_PORT_57=6
+m CMIC_LEDUP1_PORT_ORDER_REMAP_56_59 REMAP_PORT_56=7
+m CMIC_LEDUP1_PORT_ORDER_REMAP_52_55 REMAP_PORT_55=8
+m CMIC_LEDUP1_PORT_ORDER_REMAP_52_55 REMAP_PORT_54=9
+m CMIC_LEDUP1_PORT_ORDER_REMAP_52_55 REMAP_PORT_53=10
+m CMIC_LEDUP1_PORT_ORDER_REMAP_52_55 REMAP_PORT_52=11
+m CMIC_LEDUP1_PORT_ORDER_REMAP_48_51 REMAP_PORT_51=12
+m CMIC_LEDUP1_PORT_ORDER_REMAP_48_51 REMAP_PORT_50=13
+m CMIC_LEDUP1_PORT_ORDER_REMAP_48_51 REMAP_PORT_49=14
+m CMIC_LEDUP1_PORT_ORDER_REMAP_48_51 REMAP_PORT_48=15
+m CMIC_LEDUP1_PORT_ORDER_REMAP_32_35 REMAP_PORT_35=16
+m CMIC_LEDUP1_PORT_ORDER_REMAP_32_35 REMAP_PORT_34=17
+m CMIC_LEDUP1_PORT_ORDER_REMAP_32_35 REMAP_PORT_33=18
+m CMIC_LEDUP1_PORT_ORDER_REMAP_32_35 REMAP_PORT_32=19
+m CMIC_LEDUP1_PORT_ORDER_REMAP_36_39 REMAP_PORT_39=20
+m CMIC_LEDUP1_PORT_ORDER_REMAP_36_39 REMAP_PORT_38=21
+m CMIC_LEDUP1_PORT_ORDER_REMAP_36_39 REMAP_PORT_37=22
+m CMIC_LEDUP1_PORT_ORDER_REMAP_36_39 REMAP_PORT_36=23
+m CMIC_LEDUP1_PORT_ORDER_REMAP_40_43 REMAP_PORT_43=24
+m CMIC_LEDUP1_PORT_ORDER_REMAP_40_43 REMAP_PORT_42=25
+m CMIC_LEDUP1_PORT_ORDER_REMAP_40_43 REMAP_PORT_41=26
+m CMIC_LEDUP1_PORT_ORDER_REMAP_40_43 REMAP_PORT_40=27
+m CMIC_LEDUP1_PORT_ORDER_REMAP_44_47 REMAP_PORT_47=28
+m CMIC_LEDUP1_PORT_ORDER_REMAP_44_47 REMAP_PORT_46=29
+m CMIC_LEDUP1_PORT_ORDER_REMAP_44_47 REMAP_PORT_45=30
+m CMIC_LEDUP1_PORT_ORDER_REMAP_44_47 REMAP_PORT_44=31
+m CMIC_LEDUP1_PORT_ORDER_REMAP_28_31 REMAP_PORT_31=32
+m CMIC_LEDUP1_PORT_ORDER_REMAP_28_31 REMAP_PORT_30=33
+m CMIC_LEDUP1_PORT_ORDER_REMAP_28_31 REMAP_PORT_29=34
+m CMIC_LEDUP1_PORT_ORDER_REMAP_28_31 REMAP_PORT_28=35
+m CMIC_LEDUP1_PORT_ORDER_REMAP_24_27 REMAP_PORT_27=36
+m CMIC_LEDUP1_PORT_ORDER_REMAP_24_27 REMAP_PORT_26=37
+m CMIC_LEDUP1_PORT_ORDER_REMAP_24_27 REMAP_PORT_25=38
+m CMIC_LEDUP1_PORT_ORDER_REMAP_24_27 REMAP_PORT_24=39
+m CMIC_LEDUP1_PORT_ORDER_REMAP_20_23 REMAP_PORT_23=40
+m CMIC_LEDUP1_PORT_ORDER_REMAP_20_23 REMAP_PORT_22=41
+m CMIC_LEDUP1_PORT_ORDER_REMAP_20_23 REMAP_PORT_21=42
+m CMIC_LEDUP1_PORT_ORDER_REMAP_20_23 REMAP_PORT_20=43
+m CMIC_LEDUP1_PORT_ORDER_REMAP_16_19 REMAP_PORT_19=44
+m CMIC_LEDUP1_PORT_ORDER_REMAP_16_19 REMAP_PORT_18=45
+m CMIC_LEDUP1_PORT_ORDER_REMAP_16_19 REMAP_PORT_17=46
+m CMIC_LEDUP1_PORT_ORDER_REMAP_16_19 REMAP_PORT_16=47
+m CMIC_LEDUP1_PORT_ORDER_REMAP_0_3 REMAP_PORT_3=48
+m CMIC_LEDUP1_PORT_ORDER_REMAP_0_3 REMAP_PORT_2=49
+m CMIC_LEDUP1_PORT_ORDER_REMAP_0_3 REMAP_PORT_1=50
+m CMIC_LEDUP1_PORT_ORDER_REMAP_0_3 REMAP_PORT_0=51
+m CMIC_LEDUP1_PORT_ORDER_REMAP_4_7 REMAP_PORT_7=52
+m CMIC_LEDUP1_PORT_ORDER_REMAP_4_7 REMAP_PORT_6=53
+m CMIC_LEDUP1_PORT_ORDER_REMAP_4_7 REMAP_PORT_5=54
+m CMIC_LEDUP1_PORT_ORDER_REMAP_4_7 REMAP_PORT_4=55
+m CMIC_LEDUP1_PORT_ORDER_REMAP_8_11 REMAP_PORT_11=56
+m CMIC_LEDUP1_PORT_ORDER_REMAP_8_11 REMAP_PORT_10=57
+m CMIC_LEDUP1_PORT_ORDER_REMAP_8_11 REMAP_PORT_9=58
+m CMIC_LEDUP1_PORT_ORDER_REMAP_8_11 REMAP_PORT_8=59
+m CMIC_LEDUP1_PORT_ORDER_REMAP_12_15 REMAP_PORT_15=60
+m CMIC_LEDUP1_PORT_ORDER_REMAP_12_15 REMAP_PORT_14=61
+m CMIC_LEDUP1_PORT_ORDER_REMAP_12_15 REMAP_PORT_13=62
+m CMIC_LEDUP1_PORT_ORDER_REMAP_12_15 REMAP_PORT_12=63
+
+led 0 stop
+led 0 prog \
+ 06 FE 80 D2 19 71 08 E0 60 FE E9 D2 0F 75 10 81 \
+ 61 FD 02 3F 60 FF 28 32 0F 87 67 4A 96 FF 06 FF \
+ D2 2B 74 16 02 1F 60 FF 28 32 0F 87 67 4A 96 FF \
+ 06 FF D2 13 74 28 02 0F 60 FF 28 32 0F 87 67 4A \
+ 96 FF 06 FF D2 0B 74 3A 3A 48 32 07 32 08 C7 32 \
+ 04 C7 97 71 57 77 69 32 00 32 01 B7 97 71 63 32 \
+ 0E 77 6B 26 FD 97 27 77 6B 32 0F 87 57 00 00 00
+led 0 start
+
+led 1 stop
+led 1 prog \
+ 06 FE 80 D2 19 71 08 E0 60 FE E9 D2 0F 75 10 81 \
+ 61 FD 02 20 67 89 02 24 67 89 02 10 67 89 02 28 \
+ 67 89 02 2C 67 89 02 0C 67 89 02 2C 67 79 02 28 \
+ 67 79 02 24 67 79 02 20 67 79 02 10 67 79 02 0C \
+ 67 79 02 0B 60 FF 28 32 0F 87 67 56 96 FF 06 FF \
+ D2 FF 74 46 3A 36 32 07 32 08 C7 32 04 C7 97 71 \
+ 63 77 75 32 00 32 01 B7 97 71 6F 32 0E 77 77 26 \
+ FD 97 27 77 77 32 0F 87 57 12 A0 F8 15 1A 01 75 \
+ 85 28 67 56 57 32 0F 87 57 12 A0 F8 15 1A 01 71 \
+ A1 28 67 56 80 28 67 56 80 28 67 56 80 28 67 56 \
+ 57 32 0F 87 32 0F 87 32 0F 87 32 0F 87 57 00 00
+led 1 start