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Merge branch '202205' of https://github.com/Azure/sonic-buildimage in…
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…to submodule_update_202205
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vivekrnv committed Mar 20, 2023
2 parents 2786eb6 + 19a89aa commit 16dacb2
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Showing 115 changed files with 2,267 additions and 728 deletions.
1 change: 1 addition & 0 deletions .gitmodules
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Expand Up @@ -23,6 +23,7 @@
[submodule "sonic-dbsyncd"]
path = src/sonic-dbsyncd
url = https://github.com/sonic-net/sonic-dbsyncd
branch = 202205
[submodule "src/sonic-py-swsssdk"]
path = src/sonic-py-swsssdk
url = https://github.com/sonic-net/sonic-py-swsssdk.git
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1 change: 1 addition & 0 deletions Makefile.work
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Expand Up @@ -357,6 +357,7 @@ SONIC_BUILD_INSTRUCTION := make \
SHUTDOWN_BGP_ON_START=$(SHUTDOWN_BGP_ON_START) \
INCLUDE_KUBERNETES=$(INCLUDE_KUBERNETES) \
KUBERNETES_VERSION=$(KUBERNETES_VERSION) \
KUBERNETES_CNI_VERSION=$(KUBERNETES_CNI_VERSION) \
K8s_GCR_IO_PAUSE_VERSION=$(K8s_GCR_IO_PAUSE_VERSION) \
INCLUDE_KUBERNETES_MASTER=$(INCLUDE_KUBERNETES_MASTER) \
SONIC_ENABLE_PFCWD_ON_START=$(ENABLE_PFCWD_ON_START) \
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1 change: 1 addition & 0 deletions build_debian.sh
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Expand Up @@ -260,6 +260,7 @@ install_kubernetes () {
## Check out the sources list update matches current Debian version
sudo cp files/image_config/kubernetes/kubernetes.list $FILESYSTEM_ROOT/etc/apt/sources.list.d/
sudo LANG=C chroot $FILESYSTEM_ROOT apt-get update
sudo LANG=C chroot $FILESYSTEM_ROOT apt-get -y install kubernetes-cni=${KUBERNETES_CNI_VERSION}
sudo LANG=C chroot $FILESYSTEM_ROOT apt-get -y install kubelet=${ver}
sudo LANG=C chroot $FILESYSTEM_ROOT apt-get -y install kubectl=${ver}
sudo LANG=C chroot $FILESYSTEM_ROOT apt-get -y install kubeadm=${ver}
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12 changes: 12 additions & 0 deletions device/arista/x86_64-arista_720dt_48s/platform_components.json
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Expand Up @@ -12,6 +12,18 @@
"Scd(addr=0000:00:18.7)": {}
}
},
"CCS-720DT-48S-2R": {
"component": {
"Aboot()": {},
"Scd(addr=0000:00:18.7)": {}
}
},
"CCS-720DT-48S-2F": {
"component": {
"Aboot()": {},
"Scd(addr=0000:00:18.7)": {}
}
},
"CCS-720DT-48S-2R": {
"component": {
"Aboot()": {},
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@@ -0,0 +1,11 @@
{
"chassis": {
"7800R3-48CQ2-LC": {
"component": {
"Aboot()": {},
"Scd(addr=0000:00:18.7)": {},
"Scd(addr=0000:07:00.0)": {}
}
}
}
}
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@@ -0,0 +1,11 @@
{
"chassis": {
"7800R3-48CQM2-LC": {
"component": {
"Aboot()": {},
"Scd(addr=0000:00:18.7)": {},
"Scd(addr=0000:07:00.0)": {}
}
}
}
}
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Expand Up @@ -251,17 +251,6 @@ tm_port_header_type_out_202=ETH
tm_port_header_type_in_203=INJECTED_2_PP
tm_port_header_type_out_203=ETH

### SAT
## Enable SAT Interface. 0 - Disable, 1 - Enable (Default)
sat_enable=1
ucode_port_218=SAT:core_0.218
tm_port_header_type_out_218=CPU
tm_port_header_type_in_218=INJECTED_2
ucode_port_219=SAT:core_1.219
tm_port_header_type_out_219=CPU
tm_port_header_type_in_219=INJECTED_2
port_init_speed_sat=400000

### RCY
sai_recycle_port_lane_base=200
ucode_port_49=RCY0:core_0.49
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Expand Up @@ -251,17 +251,6 @@ tm_port_header_type_out_202=ETH
tm_port_header_type_in_203=INJECTED_2_PP
tm_port_header_type_out_203=ETH

### SAT
## Enable SAT Interface. 0 - Disable, 1 - Enable (Default)
sat_enable=1
ucode_port_218=SAT:core_0.218
tm_port_header_type_out_218=CPU
tm_port_header_type_in_218=INJECTED_2
ucode_port_219=SAT:core_1.219
tm_port_header_type_out_219=CPU
tm_port_header_type_in_219=INJECTED_2
port_init_speed_sat=400000

### RCY
sai_recycle_port_lane_base=200
ucode_port_49=RCY0:core_0.49
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Expand Up @@ -269,17 +269,6 @@ tm_port_header_type_out_202=ETH
tm_port_header_type_in_203=INJECTED_2_PP
tm_port_header_type_out_203=ETH

### SAT
## Enable SAT Interface. 0 - Disable, 1 - Enable (Default)
sat_enable=1
ucode_port_218=SAT:core_0.218
tm_port_header_type_out_218=CPU
tm_port_header_type_in_218=INJECTED_2
ucode_port_219=SAT:core_1.219
tm_port_header_type_out_219=CPU
tm_port_header_type_in_219=INJECTED_2
port_init_speed_sat=400000

### RCY
sai_recycle_port_lane_base=0
ucode_port_221=RCY.21:core_0.221
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Expand Up @@ -269,17 +269,6 @@ tm_port_header_type_out_202=ETH
tm_port_header_type_in_203=INJECTED_2_PP
tm_port_header_type_out_203=ETH

### SAT
## Enable SAT Interface. 0 - Disable, 1 - Enable (Default)
sat_enable=1
ucode_port_218=SAT:core_0.218
tm_port_header_type_out_218=CPU
tm_port_header_type_in_218=INJECTED_2
ucode_port_219=SAT:core_1.219
tm_port_header_type_out_219=CPU
tm_port_header_type_in_219=INJECTED_2
port_init_speed_sat=400000

### RCY
sai_recycle_port_lane_base=0
ucode_port_221=RCY.21:core_0.221
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Original file line number Diff line number Diff line change
Expand Up @@ -251,17 +251,6 @@ tm_port_header_type_out_202=ETH
tm_port_header_type_in_203=INJECTED_2_PP
tm_port_header_type_out_203=ETH

### SAT
## Enable SAT Interface. 0 - Disable, 1 - Enable (Default)
sat_enable=1
ucode_port_218=SAT:core_0.218
tm_port_header_type_out_218=CPU
tm_port_header_type_in_218=INJECTED_2
ucode_port_219=SAT:core_1.219
tm_port_header_type_out_219=CPU
tm_port_header_type_in_219=INJECTED_2
port_init_speed_sat=400000

### RCY
sai_recycle_port_lane_base=200
ucode_port_49=RCY0:core_0.49
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Original file line number Diff line number Diff line change
Expand Up @@ -251,17 +251,6 @@ tm_port_header_type_out_202=ETH
tm_port_header_type_in_203=INJECTED_2_PP
tm_port_header_type_out_203=ETH

### SAT
## Enable SAT Interface. 0 - Disable, 1 - Enable (Default)
sat_enable=1
ucode_port_218=SAT:core_0.218
tm_port_header_type_out_218=CPU
tm_port_header_type_in_218=INJECTED_2
ucode_port_219=SAT:core_1.219
tm_port_header_type_out_219=CPU
tm_port_header_type_in_219=INJECTED_2
port_init_speed_sat=400000

### RCY
sai_recycle_port_lane_base=200
ucode_port_49=RCY0:core_0.49
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@@ -0,0 +1,11 @@
{
"chassis": {
"7800R3A-36DM2-LC": {
"component": {
"Aboot()": {},
"Scd(addr=0000:00:18.7)": {},
"Scd(addr=0000:08:00.0)": {}
}
}
}
}
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